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Kenwood KRF-V7060D Service Manual page 6

Audio-video surround receiver
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4-2Pin Description for Microcomputer : MN101C49XXX (X14, IC90)
Pin No.
Pin Name
1
VREF-
2
T DEST
3
DET1
4
DET2
5
S LEVEL
6~9
AD KEY GET(1~4)
10
VREF+
11
VDD
12
OSC2
13
OSC1
14
VSS
15
XI
16
XO
17
MMOD
18
FL DIN
19
FL CS
20
FL CLK
21
FL RESET
22
IR SW
23
RF CS
24
RF DATA
25
RF CLK
26
REM I
27
REM 0
28
DIR ERF
29
DSP INTREQ
30
CE2/RDS CLK
31
CE1
32
N.C.
33
RESET
34
S BUSY
35
S DATA
36
DSP RESET
37
CODEC OVR
38
CODEC PDN
39
DIR PDN
40
AK CS
41
N.C.
42
AK CDTI
43
DIR CDTO
44
AK CLK
45
DSP MOSIO
46
DSP MISOO
47
DSP SCKO
48
SEL. ST
49
SEL. CLK
50
SEL. DATA
51~53
V. CTL 1~3
54
SV. MUTE
55
CV. MUTE
56
STEREO
57
SD
58
T MUTE
59
PLL DO
KRF-V6060D/V7060D/V8060D/X9060D/VR-6050/6060/6070
CIRCUIT DESCRIPTION
I/O
-
Connected to ground.
I
Discrimination pin for tuner destination.
I
Detection pin of output level for FL/FR.
I
Detection pin of output level for SL/SR and Center.
I
Input pin of FM S meter level.
I
A/D key (1~4) input.
-
A/D reference voltage.
-
Power supply (+5V) for microcomputer.
O
Main clock output (8.388MHz).
I
Main clock input (8.388MHz).
-
Connected to be ground.
-
Connected to be ground.
-
Unused.
-
Memory mode switch input pin (unused).
O
Transfer data output to FL driver.
O
Chip enable output to FL driver.
O
Synchronism clock output to FL driver.
O
System reset signal output to FL driver.
O
Switching pin for IR/RF.
O
Chip select output to PLL of RF-RC demodulator.
O
Data output to PLL of RF-RC demodulator.
O
Clock output to PLL of RF-RC demodulator.
I
Remote control signal input 1(Front panel).
I
Remote control signal input 1(Rear panel).
I
Detection pin for DIR ERROR signal.
I
Detection pin for DSP INTREQ.
I
Clock input of RDS demodulator IC.
I
Detection pin for DSP INTREQ.
-
Unused.
I
Reset signal input for microcomputer.
I/O
Serial busy signal input/output.
I/O
Serial data signal input/output.
O
Reset signal output to DSP.
I
Analog overflow detection pin.
O
Power down mode pin for CDDEC.
O
Power down mode pin for DIR.
O
Chip select output to DIR (X08, IC2).
-
Unused.
O
Control data output to DIR (X08, IC2).
I
Control data input from DAC (X08, IC4).
O
Clock output to DIR (X08, IC2).
O
Data output pin to DSP (X08, IC50).
I
Data input pin from DSP (X08, IC50).
O
Clock output pin to DSP (X08, IC50).
O
Strobe 1output to selector IC (X08, IC12).
O
Clock output to selector IC (X08, IC12).
O
Data output to selector IC (X08, IC12).
O
Video switch control.
O
Mute control to S-video & video selector (X14, IC65).
O
Mute control to video selector IC (X25, IC102).
I
Stereo signal input from IC1(TUNER ASSY).
I
Synchronized signal detection input.
O
Mute signal output for TUNER.
I
Data input from PLL IC (TUNER ASSY).
Pin Description
6

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