Functional Blocks - HP 27140A Hardware Reference Manual

Functional Blocks
Memory Interface
Controller
3-4 Functional Description
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Backplane
Circuitry
Multiplexer peA
MidPlane
Circuitry
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Figure 3-2. Multiplexer PeA Block Diagram
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The Backplane Interface Controller (BIC)
is
a custom gate array IC which
handles all communication control and handshaking with the CIO back-
plane. It
is
accessed by the Z-SO microprocessor as an I/O device for con-
trol signals.
The BIC also holds the CIO backplane "open" while the Memory Interface
Controller (MIC) makes a DMA transfer of data to or from the RAM on
the PCA. Duririg a DMA transfer, the. CIO backplane reads and/or writes
a packet of six bytes to or from the BIC data register. The MIC gate array
transfers these data between the BIC data register and the card RAM by
means of DMA transfers.
The Memory Interface Controller (MIC)
is
a custom CMOS gate array
which handles memory refresh and address multiplexing for the on-board
RAM. The MIC also contains the card's Direct Memory Access (DMA)
. controller. In addition, it provides address decoding, RESET signals for
the entire card, and wait states required during certain memory opera-
tions.