LG 32LT75/76 Service Manual page 24

2. DVR
FMI_DATA[ 0 - 15]
Buf f er
Buf f er
FMI_A
FMIREQ
FMIGNT
SCART_AUDIO L/ R
CS5331A
DVR_V/ Y OUT
DVR_C OUT
SCART1_DVR_FB
SCART1_DVR_R/ G/ B
VDEC_SDR_D
VDEC_SDR_A
3. STi5100 composition
FOR SCART PIN8
REC_B
FMILBA/ ( Flash d evic e lo ad b urst ad d ress/ DVB
FMIOE/ ( Out p ut enab le/ DVB - CI Cab le Card o ut p ut Enab le)
FMIWE/ ( Read no t writ e)
FMICS3/ ( Chip selec t )
FMICS1/ ( Chip selec t )
FMIBE1/ ( Byt e en ab le)
DVR
MPENC_TS__D [ 0 : 7]
MPENC_TS__CLK
MPENC_TS__VAL
MPENC_TS__SYN
MPENC_RESET_ST
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
ATA_DATA
BU9580
ATA_A
ATA_DIOW
ATA_DIOR
5331_SDATA
5331_SCLK
5331_LPRK
656_DATA
UPD64015
d ec o d er
SDRAM
2MB
TS0_DATA[ 0 : 7]
TS0_DATA_CLK
TS0_DATA_VAL
TS0_DATA_SYN
CI_EN/
CI_RST
TS_SEL/
DTV_AUDIO_MUTE
PIO_286
Tr
PIO_287
- CI Cab le Card Writ e Enab le)
LDBA[ 0: 1] ( Bank Selec t )
LDDQM[ 0: 1] ( Dat a I/ O Mas k)
Flash
FMI_D[ 0: 15]
LDDQS[ 0: 1] ( Dat a St ro b e)
FMI_A[ 1: 25]
( 8M)
LDCS/ ( Chip Selec t )
LDRAS/ ( Lat c h Ro w Ad d ress St ro b e)
LDCAS/ ( Lat c h Co lumn Ad d ress St ro b e)
LDWE/ ( Writ e Enab le)
DDR
LDA[ 0: 12]
LDCLKE( Clo c k Enab le)
( 512Mb it )
LDD[ 0: 15] LDCLK( Clo c k)
LDCLKN( Invert ed Clo c k)
TXP/ TXN
( SATA)
RXP/ RXN
TDFG - G107P
UPD61151
enc o d er
MPENC_SDR_D
MPENC_SDR_A
SDRAM
8MB SDRAM
8MB
DIGIT_D[ 0 : 7]
CLK_DIGIT
Array R
Array R
YUV_D[ 0 : 7]
YUV_PIXCLK
STI5100
OUT_LEFT
OUT_RIGHT
PCMDATA_5100[ DTV]
SCLK_5100[ DTV]
LRCLK_5100
32. 768Khz
CPU_WAIT( Wait inp ut ( Read / Writ e c yc le)
FMIREQ( DVB - CI/ Cab le Card I/ O writ e St ro b e)
FMIGNT( DVB - CI/ Cab le Card I/ O read St ro b e)
- 24 -
HDD
FE_TS0_Dat a[ 0 - 7]
FE_TS0_DATA_CLK
FE_TS0_DATA_SYNC
FE_TS0_DATA_VAL
74LCS157
IC601
IC602
MPENC_TS_D[ 0 - 7]
IC603
MPENC_TS_CLK
MPENC_TS_SYNC
MPENC_TS_TS_VAL
EEPROM
I2C_SDA0/ SCL0
I2C_SDA1/ SCL1
DTV_AUDIO_MUTE_BUF
27M
( ST5100 GPIO)
DTV_LOUT
Buf f er
DTV_ROUT
CVBS
SP_CVBS
Buf f er
SPDIF_STI_OUT
SPDIF
PCMDATA_DTV
Resist o r
SCLK_DTV
Syst em t ime t o b e p reserved when m ain
p o wer is d isc o nnec t ed
IRQ1
IRQ2
TS0_Dat a[ 0 - 7]
TS0_DATA_CLK
TS0_DATA_SYNC
TS0_DATA_VAL
MUTE_LINE_DTV
( Co rt ez GPIO)
DTV/ MNT_LOUT
Tr
CXA2069
DTV/ MNT_ROUT
DTV/ MNT_VOUT
LRCLK_DTV
LGE Internal Use Only