Sony NW-E002F Service Manual page 20

NW-E002F/E003F/E005F
• IC Pin Function Description
MAIN BOARD IC101 CXD5090-003GG
(SYSTEM CONTROLLER, NAND FLASH INTERFACE, USB INTERFACE, A/D, D/A CONVERTER, SERIAL INTERFACE)
Pin No. Pin Name
1 NAD0/GPIOC0
2 NAD1/GPIOC1
3 NAD2/GPIOC2
4 NAD3/GPIOC3
5 NAD4/GPIOC4
6 NAD5/GPIOC5
7 NAD6/GPIOC6
8 NAD7/GPIOC7
9 NCLE/GPIOC8
10 NALE/GPIOC9
11 NCE0/GPIOC10
12 NCE1/GPIOC11
13 NCE2/GPIOC12
14 NCE3/GPIOC13
15 NRE/GPIOC14
16 NWE/GPIOC15
17 NWP/GPIOC16
18 NRB0/GPIOC17
19 NRB1/GPIOC18
20 NRB2/GPIOC19
21 NRB3/GPIOC20
22 DVS
23 DVDIO2
24 DVDIO2
25 DVS
26 DVDK2
27 DVS
28 CRST2
29 RST2OUT
30 RST2VDD
31 T_ADINL
32 HPVDD
33 HPOUTL
34 PVDD
35 PGND
36 HPOUTR
37 HPGND
38 GPION0/INT8
39 GPION1/INT9
40 GPION2/INT10
41 GPION3/INT11
42 TDI
43 TMS
44 TCK
45 TDO
46 TRST
47 TEST
20
I/O
I Data signal
I Data signal
I Data signal
I Data signal
I Data signal
I Data signal
I Data signal
I Data signal
O Command latch enable signal to NAND FLASH ROM
O Address latch enable signal to NAND FLASH ROM
O Chip enable signal to NAND FLASH ROM
O Chip enable signal (Not used)
O Chip enable signal (Connected to ground terminal)
O Chip enable signal (Connected to ground terminal)
O Read signal to NAND FLASH ROM
O Write signal to NAND FLASH ROM
O Write protection signal to NAND FLASH ROM
O Read/Busy signal to NAND FLASH ROM
O Read/Busy signal (Not used)
O Read/Busy signal (Connected to +2.8V)
O Read/Busy signal (Connected to +2.8V)
— Ground terminal
— Power supply terminal
— Power supply terminal
— Ground terminal
— Power supply terminal
— Ground terminal
I Reset signal (Pull down)
O Reset signal output for Power Control IC
— Power supply terminal
— For TEST (Connected to ground terminal)
— Power supply terminal
O Headphone Lch signal output
— Power supply terminal
— Ground terminal
O Headphone Rch signal output
— Ground terminal
I Wake up signal input
I HOLD key signal input
I Function key signal input
I Function key signal input
I JTAG data input (Not used)
I JTAG test mode control signal input (Not used)
I JTAG clock signal input (Not used)
O JTAG clock signal output (Not used)
I JTAG reset input
I Boot control
Description