Schematic Diagram - Main (3/5) Section - Sony CFD-CD777SMK2 Service Manual

6-9. SCHEMATIC DIAGRAM – MAIN Section (3/5) – •
Q Q
3 7 6 3 1 5 1 5 0
(3/5)
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
C755
47
10V
C742 R741
0.47 1k
C743 R742
470p 10k
A13
R743
1M
C744
220p
T E
L 1 3 9 4 2 2 9 6 5 1 3
C790
0.01
(Page 26)
A14
DIGITAL FILTER,
D/A CONVERTER
SM5877AM
L709
EMPH L710
BCK L711
A15
PCMD L712
LRCK L713
C795
1000p
w w w
A16
A17
.
See page 34 for Waveforms. • See page 34 for IC Block Diagram.
R775 1k
C793
R781 1k
100p
R749 1k
C798 C751
1000p 1000p
FOK DATA
R730
MON XRST
33k
MDP SENS
MDS MUTE
LOCK SQCK
TEST SQSO
FILO EXCK
FILI SBSO
R740
PCO SCOR
3.3k
VSS DIGITAL SIGNAL PROCESSOR, VSS
C756 CLV SERVO
AVSS WFCK
0.01
IC702
CLTV CXD2507AQ EMPH
AVDD DOUT
RF C4M
BIAS FSTT
ASYI XTSL
ASYO XTAO
R744 R745
ASYE XTAI
100k 10k
WDCK MNT0
C745 C746
0.47 0.01
L704
R776 R764
C774
1k 1k
4.7
50V
R897 R769 C750 C773 C780
1k 10k 0.01 1000p 1000p
C763
1000p
IC704
10K
C786
1000p
10K
C764
1K
R766 R765 4.7
1k 1k 50V
1K
1K C783
220
16V
C782 C788 L720
4.7µH
0.01 0.01
x a o
y
i
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8
C792 C797 C712 C794
100p 1000p 0.1 100p R753
1k
R754
1k
R763 1k
R752
1k
L714
1K
EMPH
R792 R799
10k 1k
C752
10p
X701
16.9344MHz
C753
Q Q
10p
3 7 6 3
R791
470
XI
C759 C765
0.1 1000p
R777
10k
L702
2.2µH
Q705 Q702
KRC110M-AT KRC109M-AT
MUTING MUTING
CONTROL
C789 C830
SWITCH
L703 0.01 0.01
2.2µH
C861
0.47 R790
R778
50V 22k
22k
R768
Q706
22k
KRC110M-AT
MUTING
Q704
KRA107M-AT
MUTING
CONTROL
SWITCH
R767
10k
u 1 6 3
.
27 27
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2 4
9 9 8
CNP710
14P
5V
GND
REC
SENS
SCOR
SQCK
SQSO
CLK
XLAT
DATA
(Page 31)
XRST
MUTE
RST
LDON
1 5 1 5 0 8 9 2 4
REC
RCH
LCH
(Page 28)
DGND
COM 5V
AGND
m
(Page 29)
CD7.5V
PGND
c o
• Voltages and waveforms are dc with respect to ground
under no-signal conditions.
no mark : CD PLAY
∗ : Impossible to measure
CFD-CD777SMK2
2
9 9
9 8 2 9 9