LG U8110 Service Manual page 218

3. Measure output power as broadband power.
4. If the ACLR requirements, described in Table 11 are not met, calculate the test step necessary to
achieve the correct power. Use correlation from earlier calibrated units to calculate the new gain
setting (default correlation between VGA and output power is 1 dB and for QVGA 0.25dB).
5. Measure ACLR at this power level.
6. If the ACLR requirement is not met, reduce VGA and QVGA.
7. Measure and store the temperature at this point. This provides the value forTPmax.
8. This power and gain setting is to be used in calibration of TX power table.
9. Set gain to maximum power in medium gain mode and measure ACLR at this power
level.RFBiasshould be set to 1 andWPABiasshould be set to the same value as for maximum output
power.
10. If the requirements are not met, step the gain down and measure ACLR until the requirements are
met. The correlation between ACLR and output power is that 1 dB in power equals typical 3 dB in
ACLR. Use correlation from earlier calibrated units to calculate the new gain setting.
11. This power,Pmax measMG, is input to the calibration of TX power table.
12. Set gain to maximum power in low gain mode and measure ACLR at this power level.
RFBiasshould be set to 1 andWPABiasshould be set to the same value as for maximum output
power.
13. If the requirements are not met, step the gain down and measure ACLR until the requirements are
met. Use known correlation from earlier calibrated units to calculate the new gain setting.
14. This power,Pmax measLG, and gain setting provides input to the calibration of TX power table.
E. TX Power Table Calibration
- Purpose
The calibration data contained within the TX Power Table controls the gain for all types of power
change; including, the inner-loop power control and maximum output power of the platform.
The purpose of this calibration is to complete the TX Power gain table with values for VGA, QVGA,
RFBIAS, WPABias, and WDCDCREF that meet the specified requirements for inner-loop power-
control and Maximum output power. The size of hysteresis area must also be found.
These calibrations are designed to conform to the ME maximum output power, inner loop power
control, change of TFC and (PRACH preamble tolerances)requirements specified in 3GPP Spec
TS34.121.
- Procedure Proposal
This calibration consists of two parts: first measurements and then an off-line calculation. The
measurement results are used for characterizing the hardware so that proper settings can be
calculated for all tables. Settings and limitations are also used from maximum output calibration.
1. Perform measurements
(1) VGA behavior in LG (Low Gain) mode. PABias should not be offset and RFBIAS should be 1.
(2) VGA behavior in MG (Medium Gain mode). PABias should not be offset and RFBIAS should be 1.
(3) QVGA behavior in LG mode
(4) IQ-Gain behavior in LG mode.
(5) WPABias gain step size. Every eighth setting is measured twice. For better accuracy take the
average of each step pair. Interpolate the gain steps in between the averaged measured values.
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8. CALIBRATION