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MICROCOMPUTER'S TERMINAL DESCRIPTION
3 7 63 1515 0
Pin No.
Pin Name
94
AVSSC
95
PLFLT2
96
PLFLT1
97
AVSSB
98
ARF
99
NARF
100
VHALF
101
RV1
102
VREFH
103
DSLF2
104
DSLF1
105
AVDDB
106
JITOUT
107
AVDDA
108
TECAPA
109
AD0 (FE)
TE
110
AD2 (AS)
L 13942296513
111
AD1 (TE)
112
AD3 (ENV)
113
AD4 (RFDIFO)
114
AD5
115
AD6
116
AD7 (IOP)
117
AD8 (TEMP_DET)
118
AVSSA
119
PWM0 (FOD)
120
PWM1 (TRD)
121
VSS
122
VDD3
123
IDGT
124
DTRD
125
MONI0
126~130
MONI1~5
131
SW_2∗3
132
SW_1∗5
www
133
DMARQ
134
NIOWR
.
135
VDD3
136
VSS
24
I/O
Application
-
VSS for analog
I
Condenser 2 for PLL
I
Condenser 1 for PLL
-
VSS for analog
I
Equivalent RF+ input
I
Equivalent RF- input
I
Reference voltage 1.65V input
VREFH register for reference
I
current power supply
I
Reference voltage 2.2V input
I
Condenser 2 for DSL
I
Condenser 1 for DSL
-
VDD (3.3V) for analog
O
For jitter monitor
-
VDD (3.3V) for analog
I
Not used
I
FE input
I
AS input
I
TEph/TE3b input
I
RF envelop input
I
Push-pull TE input
I
Focus drive AD input
I
Tracking drive AD input
I
Laser diode current measurement
I
Temperature monitoring input
-
VSS for analog
O
Focus drive output
O
Tracking drive output
-
VSS
-
VDD (3.3V)
O
Not used
O
Not used
O
Internal monitor signal
O
Internal monitor signal
I
8cm Ej-STOP, Lo-START detection
I
12cm Ej-STOP detection
O
DMA request output ATAPI host
x
ao
y
I
ATAPI host write signal input
i
-
VDD (3.3V)
-
VSS
8
Pin No.
Pin Name
137
NIORD
138
IORDY
139
NDMACK
140
INTRQ
141
NIOCS16
142
DA1
143
NPDIAG
144
DA0
145
VSS
146
VDD3
147
DA2
148
NCS1FX
149
NCS3FX
150
NDASP
151
HDD15
152
HDD0
153
HDD14
Q Q
154
HDD1
3
6 7
1 3
155
HDD13
156
VDD3
157
VDD15
158
VSS
159
HDD2
160
HDD12
161
HDD3
162
HDD11
163
HDD4
164
HDD10
165
HDD5
166
VSS
167
VDD3
168
HDD9
169
HDD6
170
HDD8
171
HDD7
172
VDDH
173
NRESET
u163
174
MASTER
.
175
SCL
176
SDA
2 9
9 4
2 8
I/O
Application
I
ATAPI host read signal input
O
Ready output to ATAPI host
I
ATAPI host DMA acknowledge input
O
Interruption output to ATAPI host
O
Not used
I
ATAPI host address signal input
I
Diagnosis from ATAPI slave to master
I
ATAPI host address signal input
-
VSS
-
VDD (3.3V)
I
ATAPI host address signal input
I
ATAPI host chip select signal input
I
ATAPI host chip select signal input
O
ATAPI drive active/slave
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
1 5
0 5
8
2 9
9 4
I/O
ATAPI data input/output
-
VDD (3.3V)
-
VDD (1.5V)
-
VSS
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
-
VSS
-
VDD (3.3V)
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
I/O
ATAPI data input/output
m
-
5V reference power supply
I
ATAPI reset signal input
co
I
ATAPI master/slave signal input
O
EEPROM clock output
I/O
EEPROM data input/output
9 9
2 8
9 9
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