Diagrams - Sony ICD-MX20DR9 Service Manual

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ICD-MX20DR9
Note on Schematic Diagrams:
• All capacitors are in µF unless otherwise noted. (p: pF) 50 WV or
less are not indicated except for electrolytics and tantalums.
• All resistors are in Ω and
1
/
W or less unless otherwise specified.
4
f
: internal tolerance.
• C : panel designation.
• A : B+ Line.
• Power voltage is dc 3V and fed with regulated dc power supply
from DC IN jack (J1501).
• Voltages and waveforms are dc with respect to ground under no-
signal (detuned) conditions.
no mark : PB
(
) : REC
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal production toler-
ances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal production toler-
ances.
• Circled numbers refer to waveforms.
• Signal path.
F
: PB
L
: REC
Replacement of IC6001, IC8101 and IC8201 used in this set re-
*
quires a special tool.
• The voltage and waveform of CSP (chip size package) cannot be
measured, because its lead layout is different from that of conven-
tional IC.
12
SECTION 4

DIAGRAMS

Note on Printed Wiring Boards:
• Y : parts extracted from the conductor side.
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
Caution:
Pattern face side:
(Side B)
Parts face side:
(Side A)
Replacement of IC6001, IC8101 and IC8201 used in this set
*
requires a special tool.
• Lead layouts
Lead layout of
conventional IC
Parts on the pattern face side seen from
the pattern face are indicated.
Parts on the parts face side seen from
the parts face are indicated.
CSP (chip size package)
surface

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