Voltage Configuration; Dram Voltage - ASROCK QC5000-ITX/PH User Manual

QC5000-ITX/PH
Command Rate (CR)
The delay between when a memory chip is selected and when the first active command can
be issued.
RAS# Cycle Time (tRC)
Use this item to change RAS# Cycle Time (tRC) Auto/Manual setting.
Write Recovery Time (tWR)
The amount of delay that must elapse after the completion of a valid write operation,
before an active bank can be precharged.
Refresh Cycle Time (tRFC)
The number of clocks from a Refresh command until the first Activate command to
the same rank.
RAS to RAS Delay (tRRD)
The number of clocks between two rows activated in different banks of the same
rank.
Write to Read Delay (tWTR)
The number of clocks between the last valid write operation and the next read
command to the same internal bank.
Read to Precharge (tRTP)
The number of clocks that are inserted between a read command to a row pre-
charge command to the same rank.
Four Activate Window (tFAW)
The time window in which four activates are allowed the same rank.

Voltage Configuration

DRAM Voltage

Use this to select DRAM Voltage. The default value is [Auto].
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