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CLoD-AIOO
.PD0178(CONT ASSY IC201
)
• Mechanism control
Ie
• Pin Function
No.
Pin name
I/O
Function
I
vee
-
Power
supply
OOI1IleI:t
ion
pin.
Set
10 5V
±
10'l\.
2
XCX
0
Analog
aud
io
ex
noise
reduction
swilchirq;;
s
ignal
output pi
n
ON
:
L.
OFF
:
H
3
~I
0
AI
,
log aud io
switching
signal
output pin
IlL Sque
lch
:
H
When
digital
audio
mode,
tnc
s
ignal
is
output
through
the
control
of
the
EFM dcl;odc
r
Ie
: CXD2S00BQ.
4
~2
0
AI.log
aud
io switc llJ ng
signal
OU
tput pin
2!R
Squelch
:
H
,
XANA
0
Digi tal/analog audio sw itching signal
output
pin
Digi ta
l
:
H.
Analog:
L
Signals
output
by the
line OUI and
headphone are
sw
itched by the
s
igna
l.
6
TB
AL
ERR
I
Trac king balance error
signal input pin
(analog
s
ignal)
Signal
Is
AID
converted and
is input as the tracking o
ffset conl ro1.
RF detection signal
input
pin
(analog
s
ignal)
7
FREQ
DET
I
InpuLS
the
AID convers ion of the RF dCle<: lion OU tput and
is
used
in
the
~pind
lc
luff
se rvo-
mechanism.
Voltage
a!XI
fn:qucllCy are
proportional.
8
SLD
R ERR
I
Pi
ckup
posit
ion
detec
ti
on sw ite
ll
input pin
(a
na log signal)
Drives
the
res istance among the swit
ches, reads the
va
lue o
f
tOO
AID
input.
and
dctocts
the
position.
Tilt SCllSOr O
tHput
s
igna
l
input
pin
(analog
signal)
9
TILT
ERR
I
Inputs
(0 to
5
V) the
till
sensor output amplirred
to
a
40 to SO
dB
sig
nal.
The
signal
is
AID convened and
is
input
as
the li
lt
sensor control.
COnlrols
the lilt
moto
r unlil
lhe signal
is 2.5 V.
10
MUTE
0
Aud io sYSlem audio
mu
te
control
OUtput pin
MUTE ON
:
H.
MUTE OFF
:
L
"
THO
0
Digi
t.
1 memory control
output pin
Througll
:
H.
Memory O
N
:
L
Slider
move drive
signal output
pin
12
SLDR DR
V
0
Drive the
slider
by
cllanging the
du
ty
of lhe
, ign.l.
C
yc
le
:
)6mS,
)-v.
luc control
H
:
FWD
direction. Z
:
O
FF,
L
:
REV
d irection
Trac king operation contro
l
signa
l
output pin
"
T OFF
0
1lIe
signal
backup;
O
NIO
FF of
the
tra
cking servo
operation.
O
FF
:
H. O
N
:
L
14
GFS
I
CD(
EFM signal
) fra
me lock
signal
input pin
Connected to
pin
12 of
the EFM decoder
IC : CX D2S00BQ. Lock
: H,
Unloc
k
:
L
GFS
is
~n
abbrevi
ation fo
r Good Fram
e
Sync.
"
SI2
I
EFM
decoder IC :
CXD2500BQ
subcode
input
pin
Reads
the
subcodes
of SC
K2
and
the
signal.
16
XLAn
0
EFM
decoder IC
:
CX D2SOO BQ control
latch
s
ignal
output
pin
Sends the con trol comma
nd
using SO) and
2SOOCLK
17
SCK2
0
EFM decoder
IC
:
CXD2SOOBQ subcodc read
cloc
k
s
ignal OUtpu
t pin
Sets the
clock
to
96 and reads the
subcode.
Tracki ng o
ffset control
s
ignal oul put
pi
n
"
TBAL
DRV
0
O
utputs
tOO ITIlcking
offsct after PWM
and
is
used in auto
trllCking
offset.
Cycle: 910Jtsec,
J·
v.
luc
control H.
L,
Z.
Inpul pin
o
f
dala from mode
control
Ie
"
SITOM
I
Seri.1
Used wilh the
dat.a
signal 10 the
charllCter
gene
TIl
tor
IC.
20
SMTO
I
0
Serial
d,lla
OUtput
to the mode control IC
Serial
Cloc
k for
serial communication with the mode
control
IC
21
SCK
I,Q
In
the
input
mode except during
se
rial
communicalion
wi
th
the mode control Ie.
Used
with the clock signal 10
the
c
llaractcr
generato
r
IC.
108
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