Sony DVP-NS38 Service Manual page 68

DVP-NS28/NS38/NS39/NS47P/NS57P/NS64P/NS67P
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3 7 63 1515 0
Pin No. Pin name
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
6 6
6 7
6 8 xROMCS
6 9
7 0
7 1
7 2
7 3
TE
L 13942296513
7 4 DVDD18
7 5
7 6
7 7
7 8
7 9 LIMITSW
8 0
8 1
8 2
8 3
8 4 DVDD18
8 5
8 6
8 7
8 8
8 9
9 0
9 1
9 2
9 3
9 4
9 5
9 6
www
9 7
9 8
9 9
100
101 xSYSRST
102
http://www.xiaoyu163.com
Type
HA3 Output PU
HA4 Output PU
HA5 Output PU
HA6 Output PU
HA7 Output PU
HA8 Output PU
HA18 Output SMT, PD
HA19 Output SMT
XWR Output SMT
HA16 Output
HA15 Output PU
DVDD3 Power
HA14 Output PU
HA13 Output PU
HA12 Output PU
HA11 Output PU
HA10 Output PU
HA9 Output PU
HA20 Output SMT
Output PU,SMT
HA1 Output PU
xRD Output SMT
HD0 Output
HD1 Output
HD2 Output
Power
HD3 Output
HD4 Output
HD5 Output
HD6 Output
Output PD
NC Output PU,SMT
HD7 Output
HA17 Output
HA0 Output PU
Power
NC Output PU,SMT
NC Output PU,SMT
DVDD3 Power
IFBSY Int PU,SMT
IFCK Output PU,SMT
EEWP Output PD,SMT
xIFCS Output PU,SMT
IFSDI Input PU,SMT
SCL Output PU,SMT
SDA Output PU,SMT
TSD_M Input PU,SMT
IFSDO OutputPU,SMT
RXD Input PU,SMT
x ao
TXD Output PU,SMT
y
MUTE4 Output PD,SMT
. i
NC
Input
NC
8
Function
Host address bit3
Host address bit4
Host address bit5
Host address bit6
Host address bit7
Host address bit8
Host address bit18
Host address bit19
Read enable, active Low
Host address bit16
Host address bit15
3.3V power pin for internal digital circuitry
Host address bit14
Host address bit13
Host address bit12
Host address bit11
Host address bit10
Host address bit9
Host address bit20
Chip select, active Low
Host address bit1
Read enable, active Low
Host data bit0
Host data bit1
Host data bit2
Q Q
3 6 7 1 3
1.8V power pin for internal digital circuitry
Host data bit3
Host data bit4
Host data bit5
Host data bit6
BU Limit Switch
Address latch enable
Host data bit7
Host address bit17
Host address bit0
1.8V power pin for internal digital circuitry
8032 write strobe
8032 read strobe
3.3V power pin for internal digital circuitry
Ext. CPU Ready/Busy interrupt signal (H: Busy, L: Ready)
Ext. CPU Serial clock (H/W method)
EEPROM Write Protect control (L : write allowed)
Chip select for Ext.CPU (Low Active, H/W method)
Ext. CPU Serial data input (H/W method)
Hardwared IIC clock (Use 52.5/105kHz)
Hardwared IIC data
Motor driver thermal shutdown sensor (Active Low)
Ext. CPU Serial data Output (H/W method)
Hardwared RS232C RXD
u163
Hardwared RS232C TXD
Servo Driver MUTE Signal
.
ICE mode enable
MT1389 reset input, active Low
IR control signal input
5-2
2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
m
co
9 9
2 8 9 9