Sony STR-DA2000ES Service Manual page 80

STR-DA2000ES/DB2000
• DIGITAL BOARD IC2201 CXD9718Q (DSP)
Pin No. Pin Name
1 VSS
2
XRST
3
EXTIN
4
LRCKI3
5 VDDI
6
BCKI1
7
PLOCK
8
VSS
9 MCLK1
10
VDDI
11
VSS
12
MCLK2
13
MS
14 SCKOUT
15 LRCKI1
16 VDDE
17
BCKI1
18 SDI1
19
LRCKO
20
BCKO
21 VSS
22 KFSIO
23 to 26 SDO1 to SDO4
27
SPDIF
28
LRCKI2
29 BCKI2
30 SDI2
31 VSS
32 HACN
33 HDIN
34 HCLK
35 HDOUT
36 HCS
37 GP12
38 GP13
39 GP14
40 VDDI
41 VSS
42 GP15
43 DQM/OE0
44 CS0
45 WE0
80
I/O
— Ground terminal
I
System reset signal input from the main system controller "L": reset
I
Master clock signal input terminal Not used
I
L/R sampling clock signal (44.1 kHz) input terminal Not used
— Power supply terminal (+2.6V)
I
Bit clock signal (2.8224 MHz) input terminal Not used
O
Internal PLL lock signal output terminal Not used
—
Ground terminal
I System clock input terminal (13.5 MHz)
—
Power supply terminal (+2.6V)
—
Ground terminal
O
System clock output terminal (13.5 MHz)
Master/slave setting terminal "L": internal clock, "H": external clock
I
Fixed at "L" in this set
O
Internal system clock output terminal Not used
L/R sampling clock signal (44.1 kHz) input from the A/D converter and digital audio interface
I
receiver
—
Power supply terminal (+3.3V)
I
Bit clock signal (2.8224 MHz) input from the A/D converter and digital audio interface receiver
I Audio serial data input from the A/D converter
O
L/R sampling clock signal (44.1 kHz) output terminal
O
Bit clock signal (2.8224 MHz) output terminal
—
Ground terminal
I Audio clock signal (12.288 MHz) input from the digital audio interface receiver
O
Audio serial data output to the GPR
O
SPDIF signal output terminal Not used
L/R sampling clock signal (44.1 kHz) input from the A/D converter and digital audio interface
I
receiver
I
Bit clock signal (2.8224 MHz) input from the A/D converter and digital audio interface receiver
I
Audio serial data input from the digital audio interface receiver
—
Ground terminal
O
Acknowledge signal output to the main system controller
I
Serial data input from the main system controller
I
Serial data transfer clock signal input from the main system controller
O
Serial data output to the main system controller
I
Chip select input from the main system controller
I
Write signal input from the main system controller
O
Not used
O
Not used
—
Power supply terminal (+2.6V)
— Ground terminal
O
Not used
O
Output terminal of data input/output mask Not used
O
Chip select signal output to the S-RAM
O Write enable signal output to the S-RAM
Description