Sony STR-DA3000ES Service Manual page 98

STR-DA3000ES
Pin No. Pin Name
VSS
55
D21 to D19
56 to 58
59 A11
SDO1, SDO2
60, 61
KFSIO
62
LRCKO
63
64 BCKO
VDDI
65
VSS
66
D18, D17
67, 68
69, 70 A10, A9
CAS
71
RAS
72
VDDI
73
74 HDIN
HCLK
75
HCS
76
A8, A7
77, 78
79, 80 D16, D15
81 VSS
HDOUT
82
HACN
83
84 CSO
WEO
85
A6
86
D14 to D12
87 to 89
90 VDDE
VSS
91
D11 to D9
92 to 94
A5
95
96 VDDI
TCK
97
98 TDI
TDO
99
100 TMS
XTRST
101
VSS
102
D8, D7
103, 104
105, 106 A4, A3
GP10, GP9
107, 108
VDDI
109
GP8
110
111 GP7
GP6
112
A2, A1
113, 114
D6, D5
115, 116
98
I/O
—
Ground terminal
I/O
Two-way data bus with the S-RAM
O Address signal output to the S-RAM
O
Audio serial data output to the lip sync adjust
I
Audio clock signal input from the digital audio interface receiver
O
L/R sampling clock signal (44.1 kHz) output terminal
O Bit clock signal (2.8224 MHz) output terminal
—
Power supply terminal (+2.5V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM
O Address signal output to the S-RAM
O
Column address strobe signal output terminal Not used
O
Row address strobe signal output terminal Not used
—
Power supply terminal (+2.5V)
I Serial data input from the main system controller
I
Serial data transfer clock signal input from the main system controller
I
Chip select signal input from the main system controller
O
Address signal output to the S-RAM
I/O Two-way data bus with the S-RAM
—
Ground terminal
O
Serial data output to the main system controller
O
Acknowledge signal output to the main system controller
O Chip select signal output to the S-RAM
O
Write enable signal output to the S-RAM
O
Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
— Power supply terminal (+3.3V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM
O
Address signal output to the S-RAM
— Power supply terminal (+2.5V)
I
Simplicity emulation clock signal input terminal Not used
I
Simplicity emulation data input terminal Not used
O
Simplicity emulation data input terminal Not used
I Simplicity emulation data input start and end select Not used
I
Simplicity emulation non-sync break signal input terminal Not used
—
Ground terminal
I/O
Two-way data bus with the S-RAM
O Address signal output to the S-RAM
—
Not used
—
Power supply terminal (+2.5V)
—
Not used
I L/R sampling clock signal (44.1 kHz) input terminal
—
Not used
O
Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
Description