Pioneer DJM-800 Service Manual page 136

1
No. Mark Pin Name
A
97 EXTAL EXTAL
98 VCC VCC
99 VCC VCC
100 NC1 NC1
101 NC2 NC2
102 VSS VSS
103 STBYn
104 P63 VR_A01
105 P64 VR_A02
106 P65 VR_A03
B
107 CS0n CS0
108 CS1n CS1
109 CS2n CS2
110 CS3n CS3
111 AVCC AVCC
112 VREF VREF
113 AN0 VR0
114 AN1 VR1
115 AN2 VR2
116 AN3 VR3
C
117 AN4 VR4
118 AN5 VR5
119 AN6 VR6
120 AN7 CH1_FADER
121 AN8 CH2_FADER
122 AN9 CH3_FADER
123 AN10 CH4_FADER
124 AN11 CRS_FADER
125 AN12 TAP
126 AN13 BEAT_EFON
D 127 AN14 4896_SEL
128 AN15 RET_IN
129 AVSS AVSS
130 PG4 EMU_01
131 PG5 EMU_05
132 PG6 EMU_06
133 TXD2 SIO2_TXD
134 RXD2 SIO2_RXD
135 SCK2 SIO2_SCK
136 P53 EMU_02
137 SCK1 SIO1_CLK
E
138 SCK0 FL_CLK
139 RXD1 SIO1_RXD
140 P32 P32
141 TXD1 SIO1_TXD
142 TXD0 FL_TXD
143 MD0 MD0
144 MD1 MD1
F
136
1
2
I/O
I Crystal connection/external clock input
I Power supply
I Power supply
- Non connection (open)
- Non connection (open)
I GND
I PULL UP
O A/D input select
O A/D input select
O A/D input select
O Expansion I/O: DP_RAM (FPGA)
O Expansion I/O: LED display DATA1
O Expansion I/O: LED display DATA2
O Expansion I/O: LED display DATA3
I Power supply for A/D
I Reference voltage input for A/D
I VRin0 (MIC HIGH, LOW/H.P.MIXING, Volume) input
I VRin1 (CH1: HIGH, MID, LOW, EFFECT) input
I VRin2 (CH2: HIGH, MID, LOW, EFFECT) input
I VRin3 (CH3: HIGH, MID, LOW, EFFECT) input
I VRin4 (CH4: HIGH, MID, LOW, EFFECT) input
I VRin5 (MASTER: BALANCE, LEVEL, /Booth LEVEL/effect DEPTH) input
I VRin6 (TRIM 1-4) input
I CH1 fader input
I CH2 fader input
I CH3 fader input
I CH4 fader input
I Cross fader input
I TAP input
I Beat Effect SW
I 48K/96K switching input
I For confirming connection of the return cable
I GND for A/D
I For H8JTAG emulator
I For H8JTAG emulator
I For H8JTAG emulator
O For SIO2gloup (DAC1-4, Sound LINK_D1) DAC,SoundLINK_data
I For SIO2gloup DAC1-4, Sound LINK_D1) DAC,SoundLINK_data
O For SIO2gloup (DAC1-4, Sound LINK_D1) DAC,SoundLINK_data
I For H8JTAG emulator
O For SIO1gloup USB, FPGA, EEPROM, DIT
O For FL display
I For rewriting RXD & SIO1gloup USB, FPGA, EEPROM, DIT
O Vacant
O For rewriting TXD & SIO1gloup USB, FPGA, EEPROM, DIT
O For FL display
I Mode pin 0 NOR: Mode 4 At rewriting: Mode 3
I Mode pin 1 NOR: Mode 4 At rewriting: Mode 3
DJM-800
2
3
Pin Function
3
4
4