IBM System x3400 M3 Product Manual page 14

If memory mirroring is used, then DIMMs must be installed in pairs (a minimum of one pair per CPU), and
both DIMMs in a pair must be identical in type and size. If memory sparing is used, then DIMMs must be
installed in sets of three, and all DIMMs in the same set must be identical in type and size. Memory
sparing is only supported for Intel Xeon 5600 series processor-based systems.
The following table lists memory options available for the x3400 M3 server.
Table 5. Memory options
Part Feature Description
number code
RDIMMs
49Y1405 8940 2GB (1x2GB, 1Rx8, 1.35V) PC3L-10600 CL9 ECC
DDR3 1333MHz LP RDIMM
49Y1433* 8934 2GB (1x2GB, 2Rx8, 1.5V) PC3-10600 CL9 ECC DDR3
1333MHz LP RDIMM
49Y1406 8941 4GB (1x4GB, 1Rx4, 1.35V) PC3L-10600 CL9 ECC
DDR3 1333MHz LP RDIMM
49Y1435* 8936 4GB (1x4GB, 2Rx4, 1.5V) PC3-10600 CL9 ECC DDR3
1333MHz LP RDIMM
49Y1407 8942 4GB (1x4GB, 2Rx8, 1.35V) PC3L-10600 CL9 ECC
DDR3 1333MHz LP RDIMM
49Y1397 8923 8GB (1x8GB, 2Rx4, 1.35V) PC3L-10600 CL9 ECC
DDR3 1333MHz LP RDIMM
UDIMMs
49Y1403 A0QS 2 GB (1x 2 GB, 1Rx8, 1.35 V) PC3L-10600 CL9 ECC
DDR3 1333 MHz LP UDIMM
49Y1404 8648 4 GB (1x 4 GB, 2Rx8, 1.35 V) PC3L-10600 CL9 ECC
DDR3 1333 MHz LP UDIMM
* Withdrawn from marketing.
IBM System x3400 M3
Maximum Standard
quantity models
supported where used
16 (8 per CPU) A2x, A4x, B2x,
B4x, C2x
16 (8 per CPU) 22x, 24x, 32x,
34x, 42x
16 (8 per CPU) -
16 (8 per CPU) 52x, 54x, 62x,
72x, 74x
16 (8 per CPU) 56x, 58x, D2x,
F2x
16 (8 per CPU) -
12 (6 per CPU) -
12 (6 per CPU) -
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