BenQ Q7T3-FP737S Service Manual page 88

Dual function lcd monitor
Table of Contents

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5
D
+3.3V
+3.3V +3.3V +3.3V +3.3V
R22
1KF
R25
R26
R27
R28
Re set
10K
10K
10K
10K
2N3906
OPEN
OPEN
1
Circuit
Q2
C
VOL_ON/OFF
R69 51K
LVDS_EN
LED_GRN
R31
R68
C37
Cable-Detect
0.1U
3KF
10K
16V K
LED_ORG
Res et
+3.3V
1N4148
U9
1
5
R70
D9
NC
VDD
10K
2
VSS
3
4
NC
RES
V6300L OPEN
C101
1U
10V Z
Re set
Circuit
+3.3V
RMA DDR[0..15]
R37
R38
R39
B
10K
10K
10K
FLASH_WE
31
BANK
30
2
RMADDR15
3
+3.3V
RMADDR14
29
RMADDR13
28
RMADDR12
4
RMADDR11
25
RMADDR10
23
RMADDR9
26
R42
R43
R44
RMADDR8
27
RMADDR7
5
10K
10K
10K
RMADDR6
6
RMADDR14
RMADDR5
7
RMADDR9
RMADDR4
8
RMADDR8
RMADDR3
9
RMADDR2
10
RMADDR1
11
+3.3V
RMADDR0
12
R52
24
10K
22
32-Pin PLCC Socket
FLASH/ Prom-Jet Socket
BOOTSTRAP SIGNALS
ADDRESS
NAME
SET
DESCRIPTION
A
ROM_ADDR(4:0)
USER_BITS(4:0)
x
Available for reading from a status register
ROM_ADDR5
Reserved
x
If using 6-wire host protocol, program this bit to 0
ROM_ADDR6
SCLPOL
x
Determines polarity of HCLK signal
ROM_ADDR7
HOST_PROTOCOL
0
If using 6-wire host protocol, program this bit to 1
ROM_ADDR8
HOST_PORT_EN
1
GPIO(22:16) is on "Host Port" pins
ROM_ADDR9
OCM_START
1
1 = OCM becomes active after OCM_CLK is stable
ROM_ADDR(12:10)
USER_BITS(7:5)
x
Available for reading from a status register
ROM_ADDR13
OSC_SEL
0
0 = XTAL and TCLK pins are connected
ROM_ADDR14
OCM_ROM_CFG(1)
1
1 = All 48K of ROM is in external ROM
5
4
+3.3V
+3.3V
L1
L2
3.3V_SDDS
3.3V_DDDS
BEAD
BEAD
C15
C16
C18
+
C14
0.1U
0.1U
+
C17
0.1U
22U
16V K
16V K
22U
16V K
16V K
16V
16V
+3.3V
L3
3.3V_RDDS
BEAD
C20
0.1U
16V K
+3.3V
L4
3.3V_RGB
160
AVDD_ADC
BEAD
164
AVDD_BLUE
+
C23
C24
C25
C26
C27
168
AVDD_GREEN
22U
0.1U
0.1U
0.1U
0.1U
172
AVDD_RED
16V
16V K
16V K
16V K
16V K
157
SGND_ADC
158
AGND_ADC
161
AGND_BLUE
+3.3V
165
AGND_GREEN
169
AGND_RED
L5
3.3V_DVI
173
AVDD_IMB
BEAD
181
AVDD_RX2
+
C28
C29
C30
C31
C32
187
AVDD_RX1
22U
0.1U
0.1U
0.1U
0.1U
193
AVDD_RX0
16V
16V K
16V K
16V K
16V K
196
AVDD_RXC
175
AGND_IMB
+2.5V
L6
178
AGND_RX2
2.5V_RXPL
184
AGND_RX1
BEAD
C34
190
AGND_RX0
C33
0.1U
+
197
AGND_RXC
22U
16V K
198
AGND_RXPLL
16V
199
VDD_RXPLL_2.5
+3.3V
C35
4.7P J
149
AVSS_RPLL
+3.3V
145
AVSS_SDDS
140
AVSS_DDDS
R24
14.318MHZ
Y1
2.7K
R29
113
PPWR
114
PBIAS
100K
OPEN
C36
4.7P J
TCLK
152
TCLK
XTAL
151
XTAL
206
GPIO20/HDATA3
207
GPIO19/HDATA2
BANK
208
GPIO18/HDATA1
1
GPIO17/HDATA0
OPEN
205
BL_ON
GPIO16/HFS
R99 4.7K
204
GPIO22/HCLK
R32 0
6
DSUB_SCL
DDC_SCL
R33 0
7
DSUB_SDA
DDC_SDA
5
RESETn
4
GPIO21/IRQn
171
P.2
RED+
RED+
170
P.2
RED-
RED-
167
P.2
GREEN+
GREEN+
166
P.2
GREEN-
GREEN-
163
P.2
BLUE+
BLUE+
162
P.2
BLUE-
BLUE-
137
P.2
HS
HSYNC
136
P.2
VS
VSYNC
159
ADC_TEST
194
P.2
RXCP
RXC+
195
P.2
RXCM
RXC-
179
RX2P
P.2
RX2+
180
RX2M
P.2
RX2-
185
P.2
RX1P
RX1+
186
P.2
RX1M
RX1-
191
P.2
RX0P
RX0+
192
P.2
RX0M
RX0-
3.3V_DVI
R36 1KF
174
REXT
RMADDR15
8
ROM_ADDR15
RMADDR14
9
ROM_ADDR14
RMADDR13
10
ROM_ADDR13
RMADDR12
11
ROM_ADDR12
RMADDR11
12
ROM_ADDR11
U6 SST 39VF010
RMADDR10
13
ROM_ADDR10
RMADDR9
14
ROM_ADDR9
RMADDR8
15
WE
ROM_ADDR8
RMADDR7
16
NC/A17
ROM_ADDR7
RMADDR6
17
A16
ROM_ADDR6
RMADDR5
18
A15
ROM_ADDR5
RMDATA7
RMADDR4
21
19
A14
DQ7
ROM_ADDR4
RMDATA6
RMADDR3
20
22
A13
DQ6
ROM_ADDR3
RMDATA5
RMADDR2
19
23
A12
DQ5
ROM_ADDR2
RMDATA4
RMADDR1
18
24
A11
DQ4
ROM_ADDR1
RMDATA3
RMADDR0
17
25
A10
DQ3
ROM_ADDR0
RMDATA2
15
A9
DQ2
RMDATA1
RMDATA7
14
28
A8
DQ1
ROM_DATA7
RMDATA0
RMDATA6
13
29
A7
DQ0
ROM_DATA6
RMDATA5
30
A6
ROM_DATA5
RMDATA4
31
A5
ROM_DATA4
RMDATA3
32
A4
ROM_DATA3
RMDATA2
33
A3
ROM_DATA2
RMDATA1
34
A2
ROM_DATA1
RMDATA0
35
A1
ROM_DATA0
1
+3.3V
A0
NC
ROM_OEn
36
ROM_OEn
32
OE
VCC
16
C39
CE
GND
0.1U
16V K
+2.5V
Close to respective power Pins
C42
C43
C44
C45
C46
+
C40
0.1U
0.1U
0.1U
0.1U
0.1U
22U
16V K
16V K
16V K
16V K
16V K
16V
4
3
C19
0.1U
+2.5V
+3.3V
D CLK
R21
0
C21
C22
47P
47P
OPEN
OPEN
118
DCLK/TCON_OCLK
115
D EN
4
R N1
5
DEN/TCON_ECLK
117
D HS
3
6
DVS/TCON_FSYNC
116
DVS
2
7
DHS/TCON_LP
1
8
100
110
100
1
PD47/OB7
109
2
PD46/OB6
108
3
PD45/OB5
107
4
PD44/OB4
R N2
106
PD43/OB3
105
PD42/OB2
104
PD41/OB1
103
PD40/OB0
100
102
1
8
PD39/OG7
101
2
7
PD38/OG6
100
3
6
PD37/OG5
99
4
5
PD36/OG4
RN4
96
PD35/OG3
95
PD34/OG2
94
PD33/OG1
93
PD32/OG0
100
92
1
8
PD31/OR7
91
2
7
PD30/OR6
90
3
6
PD29/OR5
87
4
5
PD28/OR4
RN6
86
PD27/OR3
85
PD26/OR2
84
PD25/OR1
83
PD24/OR0
100
80
1
8
PD23/EB7
79
2
7
PD22/EB6
78
3
6
PD21/EB5
77
4
5
PD20/EB4
RN8
76
PD19/EB3
U4
75
PD18/EB2
74
PD17/EB1
73
PD16/EB0
100
72
1
8
PD15/EG7
71
2
7
PD14/EG6
70
3
6
PD13/EG5
69
4
5
GM2120
PD12/EG4
RN10
66
PD11/EG3
65
PD10/EG2
64
PD9/EG1
63
PD8/EG0
100
710212000E
62
1
8
PD7/ER7
61
2
7
PD6/ER6
60
3
6
PD5/ER5
59
4
5
PD4/ER4
RN12
58
PD3/ER3
57
PD2/ER2
56
PD1/ER1
55
PD0/ER0
+3.3V
+3.3V
119
TCON_OSP
120
TCON_OPOL
121
TCON_OINV
122
TCON_ESP
R34
R35
123
TCON_EPOL
124
TCON_EINV
10K
10K
125
TCON_RSP2
OPEN
126
TCON_RSP3
127
TCON_RCLK
49
GPIO10/TCON_ROE3
48
GPIO9/TCON_ROE2
128
TCON_ROE
RXD
44
GPIO4/UART_D1
TXD
45
GPIO5/UART_D0
SCL
52
GPIO13
SDA
51
GPIO12
39
GPIO8/IRQINn
50
GPIO11
47
GPIO7
46
GPIO6/EXTCLK
43
GPIO3/TIMER1
42
GPIO2/PWM2
41
GPIO1/PWM1
40
GPIO0/PWM0
R45
R46
R47
201
CLKOUT
Int_Test
10K
10K
10K
200
N/C
142
N/C
132
Reserved
131
Reserved
+3.3V
Close to respective power Pins
C47
C48
C49
C50
C51
C52
C53
+
C41
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
22U
16V K
16V K
16V K
16V K
16V K
16V K
16V K
16V
3
2
DCLK_TTL
DEN_TTL
C N1
C N2
C N3
C N4
DHS_TTL
DVS_TTL
22P OPEN
22P OPEN
22P OPEN
22P OPEN
8
7
6
5
100
1
8
2
7
3
6
4
5
RN3
100
1
8
2
7
3
6
4
5
R N5
100
1
8
2
7
3
6
4
5
R N7
100
1
8
2
7
3
6
4
5
R N9
100
1
8
2
7
3
6
4
5
RN11
100
1
8
2
7
3
6
4
5
RN13
C N7
C N8
C N9
CN10
22P OPEN
22P OPEN
22P OPEN
22P OPEN
LCD_ON
KEY_EXIT
I_KEY
FLASH_WE
KEY_DEC
KEY_INC
KEY_MENU
PW_SW
VOLUME
BRT_ADJ
R48
R49
R50
R51
10K
10K
10K
10K
+3.3V
C54
C55
C56
C57
C58
C59
C60
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
16V K
16V K
16V K
16V K
16V K
16V K
16V K
2
1
D
CN5
C N6
22P OPEN
22P OPEN
OB7
OB6
OB5
OB4
OB3
OB2
OB1
OB0
OG7
OG6
OG5
OG4
OG3
OG2
OG1
OG0
OR7
OR6
OR5
OR4
OR3
OR2
OR1
OR0
EB7
C
EB6
EB5
EB4
EB3
EB2
EB1
EB0
EG7
EG6
EG5
EG4
EG3
EG2
EG1
EG0
ER7
ER6
ER5
ER4
ER3
ER2
ER1
ER0
CN11
CN12
22P OPEN
22P OPEN
B
+3.3V
C38
0.1U
16V K
R40
R41
U7
10K
10K
8
1
VCC
NC
7
2
WP
NC
SCL
6
3
SCL
NC
SDA
5
4
SDA
GND
AT24C16 16K
J3
3
TXD
2
RXD
1
CON_3P_S
RS232
A
Benq Corporation
Project Code
Model Name
OEM/ODM Model Name
99.L8372.001
Q7T3-FP767S
NA
Title
INTERFACE BOARD
Size
P CB Rev.
Document Number
R e v .
PCB P/N
<Size>
48.L8301.S11
S11
99.L8372.000-C2-204-004
0
3
Date:
Tuesday, February 11, 2003
Sheet
o f
5
Prepared By
Reviewed By
Approved By
ANGEL HU
JAMSON LIU
DAVEN WU
1

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