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Vertical Deflection
Vertical Sync from the Small Signal Panel is applied to the Large Signal Panel via J601 Pins 2
and 7 and is applied to IC551 Pin 13 Deflection Processor.
(Figure 6)
Vertical drive exits IC551
Pin 8 and is applied to IC550 Pins 1 and 3.
The Vertical Output IC550 receives its power from the 28V source. This voltage is applied to
IC550 Pin 9 to a Voltage Stabilizer circuit inside the IC. The Flyback Generator circuit is
powered by the 28V Source through Diode D550 to IC550 Pin 6. Capacitor C557 charges
during the vertical scan time and discharges back into IC550 Pin 8 during vertical retrace to
shorten retrace time. A Thermal and Soar Protection circuit monitors the temperature and
operation of the IC. It will defeat the output on Pin 5 if the IC becomes too hot. The Vertical
Drive signal for the Yokes exits IC550 Pin 5.
Feedback and dc bias from the Yoke return circuit is applied to the Vertical Drive circuit to
IC551 Pin 6 via R561, R562, C560 and R565, and R586. Linearity correction is developed by
the resistor capacitor network of R560 and R565.
Dynamic Focus correction signals are fed to the base of Q2830 through R2835 and C2837,
and to the emitter through R2810 and C2805. Transistor Q2830 drives Transformer T802 to
produce Dynamic Focus drive.
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