L2 Cache Memory - SOYO SY-7VBA 133 User Manual

BIOS Setup Utility
Quick CPU Frequency Setup (Continued)
Quick CPU
Frequency Setup
If [CPU Frequency] field is set to [Manual]
CPU Ratio
DRAM Clock
SDRAM Cycle
Length

3-1.2 L2 Cache Memory

CPU L2 Cache
Latency Adjust Set 01~15
3-1.3 C.I.H. 4-WAY Protection Settings
Setting
C.I.H. 4- Disabled
WAY
Enabled
Protection
Setting Description
After you have selected the host clock, choose the right
multiplier for the CPU. Options are: [2, 2.5, 3., 3.5, 4, 4.5, 5,
5.5,6,6.5,7.0,7.5,8.0]. The CPU frequency is then defined as
[host clock freq.]x[multiplier], and should the working
frequency of your Pentium
HCLK-33M
This item allows you to control
Host Clock
the DRAM speed.
HCLK+33M
2 When synchronous DRAM is
3 installed, the number of clock
cycles of CAS latency depends
on the DRAM timing. Do not
reset this field from the default
value specified by the system
designer.
Setting
Def xx This item allows the user to adjust
the CPU L2 cache latency. This
item should only be used by
experienced users. Setting it to an
inappropriate value can crash the
system.
When set to enabled, the BIOS can only
be programmed through AWDFLASH,
making sure that any virus is unable to
program the system BIOS. Set to
disable the BIOS can be programmed
the traditional way.
®
III & Celeron™ processor.
Description
Description
58
SY-7VBA 133
Note
Default
Default
Note
Default
Note
Default