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5
- Pin Functions (PE5352B)
Pin No.
Pin Name
1
BSO
bsck
2
3, 4
DFS1, 2
5
DCKS
6
EVDD
7
EVSS
dspok
8
9
DCOPY
crst
10
11, 12
NC
13
EMPH
emph
14
15
DSPMUTE
16
DSET
adena
17
18
IC/VPP
19
BRXEN
bsrq
20
xtalen!
21
xtalen@
22
xrst
23
24
VDCONT
25
CD3VON
26
CONT
xwait
27
28
LOEJ
29
CLCONT
30
CDMUTE
reset
31
32
XT1
33
XT2
34
REGC
35
X2
36
X1
37
VSS
38
VDD
39
CLKOUT
xwrite
40
uben
41
42
WR/W
xread
43
44
XASTB
45
LOCK
wrst
46
47-54
AD0-7
55
BVDD
56
BVSS
57-64
AD8-15
xcs
65
wcs
66
67, 68
DBBWRDY0, 1
69, 70
DBBRRDY0, 1
71
AVDD
72
AVSS
73
AVREF
74
VDSENS
75
DSCSNS
76
TEMP
5
6
I/O
Format
Function and Operation
O
C
P-Bus serial data output
I/O
/C
P-Bus serial clock input/output
O
C
DA I/F IC sampling frequency setting output 1, 2
O
C
DA I/F IC clock subharmonic number selection output
E power supply Positive power supply
E power supply GND
I
DSP microcomputer initialization OK input
O
C
DA I/F IC copy flag setting output
O
C
Compression IC reset control output
Not used
O
C
Emphasis information output
O
C
Emphasis information output
O
C
DOUT mute output
O
C
Disc set indicator lighting output
O
C
A/D reference voltage supply control output
IC : VSS direct connection/VPP : Pull-down
I/O
/C
P-Bus reception is possible
I/O
/C
P-Bus service request demand
O
C
CD LSI 16.9344MHz oscillation permission output
O
C
CD LSI 24.576MHz oscillation permission output
O
C
CD LSI reset control output
O
C
VD power supply control output
O
C
CD +3.3V power supply control output
O
C
Servo driver power supply control output
I
CD LSI wait control signal input
O
C
The direction change output of LOAD/EJECT
O
C
Driver input change output
O
C
CD mute control output
I
System reset input
I
Connected to the oscillator for subclock
(connected to VSS via the resistor)
Connected to the oscillator for subclock (Open)
Connected to the capacity stabilizing output of the regulator
(an electrolytic capacitor of about 1µF)
Oscillator connection for mainclock
I
Oscillator connection for mainclock
GND
Positive power supply (5V)
O
C
Internal system clock output (Open)
O
CD LSI write control signal output
O
Not used (Open)
O
WMA decoder Read/Write control signal output
O
CD LSI read control signal output
O
CD LSI address strobe output
I
Spindle lock input
O
C
WMA decoder reset control output
I/O
/C
Address/Data bus 0-7
B power supply Positive power supply (3.3V)
B power supply GND
I/O
/C
Address/Data bus 8-15
O
C
CD LSI chip selection output
O
C
WMA decoder chip selection output
I
Input of write-ready flag with WMA decoder DBBI0, 1
I
Input of read-ready flag with WMA decoder DBBO0, 1
A power supply Positive power supply (5V)
A power supply GND
The reference voltage input for A/D converter
VD power supply short sense input
Disc state sense input
Temperature information sense input
DEH-P450MP/XM/UC
6
7
7
8
A
B
C
D
E
F
65
8
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