LG 47LT760H Service Manual page 28

EAX6430790* : LD22* / LC22*
EAX6443420* : LT22* / LJ22* / LA22* / LB22*
NVRAM
+3.5V_ST
Write Protection
- Low : Normal Operation
R103 IC104 +3.5V_ST - High : Write Protection
R105
4.7K
4.7K M24M01-HRMN6TP
OPT
R104
4.7K NC VCC
1 8
OPT
R183
R182
E1 WP
2 7 2.7K
2.7K
E2 SCL
R136 33
3 6
VSS SDA
R137 33
4 5
OPT
R1030 33
R1031 OPT 33
HDCP EEPROM
+3.3V_NORMAL
HDCP_EEPROM_ST
IC100
M24C16-R
C101
0.1uF
16V
NC_1 VCC
1 8
NC_2 WC R181 4.7K
2 7
NC_3 SCL
R191 22
3 6
I2C_SCL1
VSS SDA R192 22
4 5
I2C_SDA1
I2C
R128 R131 R134 R139 R142 R173
1.2K 1.2K 2.7K 2.7K 2.7K 2.7K
R110 33
STB_SCL
R111 33
STB_SDA
R112 33
OPCTRL_11_SCL
R113 33
OPCTRL_10_SDA
R114 33
OSCL1
R115 33
OSDA1
R116 33
OSCL2
R117 33
OSDA2
R118 33
OSCL0
R121 33
OSDA0
R122 33
OPCTRL_1_SCL
R123 33
OPCTRL_0_SDA
Model Option
+3.3V_NORMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
+3.3V_NORMAL +3.3V_NORMAL
JTAG
AR100 R146
10K 10K
MTK_JTAG
JTRST#
JTDI
JTMS
SCL_NVRAM
JTCLK
SDA_NVRAM
I2C_SCL4 R143 33
JTDO
I2C_SDA4
MTK_JTAG
+3.3V_NORMAL
R144
10K
HDCP_EEPROM_MICRO
IC100-*1 R145 R149
24LC16B 10K 10K
MTK_JTAG MTK_JTAG
A0 8 VCC
1
A1 7 WP
2
A2 6 SCL
3
VSS 5 SDA
4
+3.3V_NORMAL
R147 R153
R150
1K 1K
1K
OPT
OPT
LED_PWM0
LED_PWM1
OPCTRL3
R151
R148 R154
1K
1K 1K
OPT
I2C_1 : AMP, L/DIMMING,HDCP KEY
I2C_2 : T-CON
I2C_3 : MICOM
I2C_4 : S/Demod,T2/Demod, LNB
I2C_5 : NVRAM
I2C_6 : TUNER_MOPLL(T/C,ATV)
+3.3V_NORMAL
R185 R188
R156 R160
R164 R177
2.7K 2.7K
2.7K 2.7K
2.7K 2.7K
I2C_SCL1
I2C_SDA1
I2C_SCL2
I2C_SDA2
I2C_SCL3
I2C_SDA3
I2C_SCL4
TS_S_OUT_CLK
I2C_SDA4
I2C_SCL5
I2C_SDA5
I2C_SCL6
I2C_SDA6
MT5369_MCLKI
SoC
NO_FRC internal
FRC
MODEL_OPT_0
0 0
MODEL_OPT_1
0 1
MODEL_OPT_0
MODEL_OPT_1
HIGH
MODEL_OPT_2
MODEL_OPT_2 FHD
MODEL_OPT_3
MODEL_OPT_3 OPTIC
/S2_RESET
MODEL_OPT_4
MODEL_OPT_4 3D DEPTH 3D_Depth_IC
MODEL_OPT_5
DDR DDR_768MB
MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_6 CP BOX Enable
M_RFModule_ISP
MODEL_OPT_7
MODEL_OPT_8 MODEL_OPT_7
T2 Tuner Support
MODEL_OPT_9
MODEL_OPT_8
S Tuner Support
MODEL_OPT_10
MODEL_OPT_9 Reserved
MODEL_OPT_10
EPI Support
MODEL OPTION 8 is just for CP Box
It should not be appiled at MP
Close to eMMC Flash
MTK_JTAG
R152 MTK_JTAG
(IC8100)
P100
1K
12507WS-12L
1
EMMC_CLK
2
R174
3 10K
4
5
6
7
8
9
10
11
12
13
STRAPPING LED_PWM0 LED_PWM1 OPCTRL3
ICE mode + 27M + Serial boot 0 0 0
ICE mode + 27M + ROM to Nand boot 0 0 1
ICE mode + 27M + Rom to eMMC boot 0 1 0
from eMMC pins (share pins w/s NAND)
ICE mode + 27M + ROM to eMMC boot 0 1 1
from SDIO pins
SOC -> Pro:Idiom or CI SLOT
SOC -> Pro:Idiom or CI SLOT
MT5369_MCLKI_SW
SOC -> CI SLOT
MT5369_MIVAL_ERR
OPT
MT5369_MISTRT
R1026 0
MT5369_TS_OUT[0-7]
+3.3V_NORMAL
R1028
IC106
10K
NLASB3157DFT2G
TCLK_SEL
B1 SELECT
+3.3V_NORMAL
1 6
GND VCC
2 5
CI_DATA[0-7]
C121
B0 A 0.1uF
3 4
MT5369_MCLKI_SW
OPT
R1027 0
LG FRC2 Reserved
/USB_OCD1
1 1
0 1
USB_CTL1
LOW
HD
NON_OPTIC
NON_3D_Depth_IC
DDR_Default
Disable
Not Support
Not Support
Default
Not Support
Crystal Matching Test result
: 27pF -> 20pF -> 24pF
X-TAL
MT5369_XTAL_IN
LGE2112
AP14
JTCLK JTCK
AM14
JTDI JTDI
AR14
JTDO JTDO
AR15
JTMS
JTMS
AN14
JTRST# JTRST
AP12
OSDA0 OSDA0
AN12
OSCL0
OSCL0
AP15
OSDA1
OSDA1
AN15
OSCL1 OSCL1
AT34
MT5369_XTAL_IN XTALI
AU34
MT5369_XTAL_OUT XTALO
AVDD_33SB
AK27
AVDD33_XTAL_STB
AH26
C116
AVSS33_XTAL_STB
0.1uF
AVDD_33SB
AK18
AVDD33_VGA_STB
C117 AK17
AVSS33_VGA_STB
0.1uF
VDD3V3
AK23
AVDD33_PLLGP
C118 AM27
AVSS33_PLLGP
0.1uF
AJ20
AVDD10_LDO
C107
C108
2.2uF
2.2uF
10V 10V
CI_ADDR[0-14]
CI_ADDR[0]
H32
GPIO0
CI_ADDR[1] F37
GPIO1
CI_ADDR[2] F36
GPIO2
TS_S_OUT_VAL CI_ADDR[3] G37
GPIO3
TS_S_OUT_SYNC CI_ADDR[4] G36
GPIO4
TS_S_OUT_DATA CI_ADDR[5] G35
GPIO5
CI_ADDR[6] G34
GPIO6
CI_ADDR[7] H34
GPIO7
R1021
0 CI_ADDR[8] L34
GPIO8
CI_ADDR[9] L32
GPIO9
CI_ADDR[10] K33
R1022 0 GPIO10
CI_ADDR[11] K32
R1023 0 GPIO11
CI_ADDR[12] H33
GPIO12
CI_ADDR[13] L35
GPIO13
CI_ADDR[14] K36
GPIO14
J32
GPIO15
J34
GPIO16
K34
GPIO17
0
MT5369_TS_OUT[0] K35
GPIO18
MT5369_TS_OUT[1] K37
R1024
GPIO19
MT5369_TS_OUT[2] J36
GPIO20
MT5369_TS_OUT[3] J37
GPIO21
MT5369_TS_OUT[4] J35
GPIO22
MT5369_TS_OUT[5] J33
GPIO23
MT5369_TS_OUT[6] G33
GPIO24
MT5369_TS_OUT[7] H35
GPIO25
CI_DATA[0] H31
GPIO26
CI_DATA[1] F34
GPIO27
CI_DATA[2] E36
GPIO28
CI_DATA[3] N33
GPIO29
CI_DATA[4] P32
GPIO30
CI_DATA[5] M35
GPIO31
CI_DATA[6] M37
GPIO32
CI_DATA[7] M33
GPIO33
F35
MT5369_TS_IN[0]
GPIO34
E35
MT5369_TS_IN[1] GPIO35
E37
MT5369_TS_IN[2]
GPIO36
N32
CI SLOT -> SOC MT5369_TS_IN[3] GPIO37
M34
MT5369_TS_IN[4]
GPIO38
M36
MT5369_TS_IN[5] GPIO39
M32
MT5369_TS_IN[6] GPIO40
L33
MT5369_TS_IN[7] GPIO41
E33
/USB_OCD2
GPIO42
E32
GPIO43
R1010 100 F32
WARM_MODE GPIO44
A29
USB_CTL2
GPIO45
D31
GPIO46
C31
C102 C106 C123
C122
/USB2SER_RESET GPIO47
0.1uF 0.1uF 0.1uF R1033 0 E30
0.1uF
LAN1_DET GPIO48
OPT OPT OPT E31
OPT
MODEL_OPT_0
GPIO49
F31
MODEL_OPT_1 GPIO50
E29
ERROR_OUT GPIO51
AP9
MODEL_OPT_3 GPIO52
AT9
MODEL_OPT_7 M_RFModule_ISP GPIO53
AR9
MODEL_OPT_5 GPIO54
SC_ID_SOC AU9
MODEL_OPT_6 GPIO55
NON_EU
R193 10K AN23
ADIN0_SRV
R176 10K AN24
ADIN1_SRV
R162 AP23
10K
ADIN2_SRV
R163 10K AR23
ADIN3_SRV
AU23
M_RFModule_RESET
ADIN4_SRV
AT23
OPC_EN ADIN5_SRV
100
R1016 AM24
/TU_RESET ADIN6_SRV
AM23
MODEL_OPT_4 /S2_RESET ADIN7_SRV
xxLT760H-UA
MID_MAIN_1
12pF Crystal&load cap.
X100-*1
27.0MHZ
12pF Crystal
C113-*1
C115-*1
8pF
8pF
X100
50V 50V
27MHz
R119 12pF Crystal 12pF Crystal
MT5369_XTAL_OUT
0
C113 C115
24pF
24pF
IC105
AR18
U0TX SOC_TX
AP18
U0RX SOC_RX
AU16
U1RX MTK_NEC_RX
AT16
U1TX MTK_NEC_TX
A35
POWE EMMC_CMD
C33
POOE
B34
EMMC_DATA[2-7]
POCE1
D33
POCE0 EMMC_DATA[7]
D29
PDD7
EMMC_DATA[6]
C30
PDD6 EMMC_DATA[5]
D30
PDD5
EMMC_DATA[4]
B31
+3.3V_NORMAL
PDD4
EMMC_DATA[3]
A31
PDD3
EMMC_DATA[2]
B32
PDD2 R157
A32
4.7K
PDD1
C32 OPT
PDD0
D32
PARB R178
A34
4.7K
PACLE EMMC_DATA[1]
C34
OPT
EMMC_DATA[0]
PAALE
C29
+3.3V_NORMAL
EMMC_CLK EMMC_CLK
AM20
OPWRSB R155
10K
R1003 100
AM22
OPT
ORESET
Q1001
OPT
C MMBT3904(NXP)
33
AU21 R158
OPT
OIRI IR B
OPT SOC_RESET
R1002
D27 R159 4.7K
10K
FSRC_WR
E
OPT
AT21
STB_SCL
STB_SCL
AR21 R172 22
STB_SDA STB_SDA
T34
C114
DEMOD_RST PCM_RST
T32 0.1uF
DEMOD_TSCLK 16V
T36
SOC <- P:I
DEMOD_TSDATA0
U36
DEMOD_TSDATA1 TS_S_IN_0_CLK
T33
DEMOD_TSDATA2 TS_S_IN_0_VAL
T30
DEMOD_TSDATA3 TS_S_IN_0_SYNC
V33
DEMOD_TSDATA4 TS_S_IN_0_DATA
V32
DEMOD_TSDATA5
V31
DEMOD_TSDATA6
V30
DEMOD_TSDATA7
T35
DEMOD_TSSYNC
T31
DEMOD_TSVAL
N36
/PCM_REG
CI_INT
T37
CI_TSCLK /PCM_CE1
R35
CI_TSDATA0 MT5369_TS_SYNC
CI SLOT -> SOC
R37
CI_TSSYNC /PCM_WE
R36
CI_TSVAL /PCM_OE
R34
R1005 0
MT5369_TS_VAL
PVR_TSCLK CI SLOT -> SOC
R32 R1006 0
PVR_TSVAL CI_A_VS1
R33
R1007 0
MT5369_TS_CLK
PVR_TSSYNC CI SLOT -> SOC
P33 R1008 0
PVR_TSDATA0 /PCM_IRQA
P34
R1001 0
/PCM_WAIT
PVR_TSDATA1
+3.3V_NORMAL
N37
/CI_CD2
SPI_CLK1
P35
SPI_CLK /CI_CD1
N34
SPI_DATA /PCM_IORD R168 R161
N35
R166 4.7K 4.7K
SPI_CLE /PCM_IOWR
2.7K OPT
OPT
OPT
AU12 R171
22
OPWM2 PWM_DIM2
AT12 R170 22
OPWM1 PWM_DIM1
AR12 R169 10K
A_DIM
OPWM0
OPT
C120
A37 R197 R198
2.2uF
SD_D0 1K 1K
C35
10V
SD_D1
A36 OPT
SD_D2
B35 PWM2_PULL_DOWN_1K
SD_D3 PWM1_PULL_DOWN_1K
B36
SD_CMD
B37
SD_CLK
AT11
LDM_CS
AU11
L/DIM0_SCLK
LDM_CLK
AR10
LDM_VSYNC L/DIM0_VS
AM9
L/DIM0_MOSI
LDM_DO
AP10
LDM_DI
AN22
LED_PWM1
LED_PWM1
AP21
LED_PWM0 LED_PWM0
5V Tolerance
AU20
OPCTRL11 OPCTRL_11_SCL
AT20
OPCTRL10 OPCTRL_10_SDA
AN18
LAN2_DET
OPCTRL9
AP20
OPCTRL8 SC_DET
AM18
DSUB_DET
OPCTRL7
AN19 R1025 100
OPCTRL6 TCLK_SEL
AP19
HDMI_CEC
OPCTRL5
R1014 0 OPT
AR19
OPCTRL4 MAIN_AMP_RESET
R1015 33 OPT
AN21
OPCTRL3
OPCTRL3
AM19
R1009 0
OPCTRL2 EXT_SPK_DET
AN20
OPCTRL1 OPCTRL_1_SCL
AR20
OPCTRL0 OPCTRL_0_SDA
2011.09.29
8
LGE Internal Use Only