LG 42LM660S Service Manual page 26

CI TS INPUT
Close to MT5369
MT5369_TS_OUT[0-7] AR902
MT5369_TS_OUT[0]
MT5369_TS_OUT[1]
MT5369_TS_OUT[2]
MT5369_TS_OUT[3]
MT5369_TS_OUT[4]
MT5369_TS_OUT[5]
MT5369_TS_OUT[6]
MT5369_TS_OUT[7]
AR903
R907 47
MT5369_MISTRT
R908 47
MT5369_MIVAL_ERR
R909 47
MT5369_MCLKI
Close to MT5369
CI TS OUTPUT
Close to CI Slot
MT5369_TS_IN[0-7]
MT5369_TS_IN[0] AR900
MT5369_TS_IN[1]
MT5369_TS_IN[2]
MT5369_TS_IN[3]
MT5369_TS_IN[4]
AR901
MT5369_TS_IN[5]
MT5369_TS_IN[6]
MT5369_TS_IN[7]
Close to CI Slot
R915
MT5369_TS_CLK
R916
MT5369_TS_VAL
R917
MT5369_TS_SYNC
C900
12pF
Close to MT5369 50V
OPT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CI DETECT
CI_MDI[0-7]
47
CI CI_MDI[0]
CI_MDI[1]
CI_MDI[2] /CI_CD1
CI_MDI[3]
/CI_CD2
CI CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
47
PCM_RST
CI_IN_TS_SYNC
CI_IN_TS_VAL
CI_IN_TS_CLK
C902
12pF
50V Close to CI Slot
OPT
CI_TS_DATA[0-7]
47 CI
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
47 CI CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
47 CI
CI_TS_CLK
47 CI
CI_TS_VAL
47 CI
CI_TS_SYNC
+3.3V_NORMAL
R910 R914
10K 10K
CI CI
/PCM_WAIT
+3.3V_NORMAL
PCM_INPACK
CI_VS1
R906 R913 R919
R918 R923 R924 /PCM_REG
10K 47K 47K
47K 10K
10K
OPT CI CI CI
OPT OPT
/PCM_CE2
/PCM_IRQA
R900
10K
OPT
/PCM_IORD
/PCM_IOWR
/PCM_OE
/PCM_WE
/PCM_CE1
+5V_CI_ON
C904 C905
0.1uF 10uF
10V
CI
CI
/CI_CD1
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
R911 22
/PCM_IORD /PCM_CE2
/PCM_IOWR CI_VS1
R912 22
CI_MDI[0-7]
CI_MDI[0]
CI_MDI[1]
CI_MDI[2]
CI_MDI[3]
CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
CI_TS_CLK
R921 22 CI
PCM_RST
R922 22 CI
/PCM_WAIT
R920 22 OPT
PCM_INPACK
/PCM_A_REG
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
/CI_CD2
R925
0
CI_A_DATA[0-7]
+5V_CI_ON
R929 R930
R933 R934 R935 R936
10K
47K
10K
10K 10K 10K
CI CI
OPT
OPT
CI
CI
CI_A_ADDR[0-14]
22 R931
CI_VS1
CI_A_VS1
OPT
R932 22
/PCM_A_REG /PCM_REG
OPT
JK900
10118309-015LF
CI
GND GND
35 1
100 /CI_DET1 DAT3 CI_A_DATA[3]
R927 36 2
CI TS_OUT3 DAT4
CI_A_DATA[4]
37 3
TS_OUT4 DAT5 CI_A_DATA[5]
38 4
TS_OUT5 DAT6
39 5 CI_A_DATA[6]
TS_OUT6 DAT6 CI_A_DATA[7]
40 6
TS_OUT7
41 7 /CARD_EN1 CI R939 22
CARD_EN2 ADDR10
42 8
VS1
43 9 /O_EN
IORD ADDR11
44 10
IOWR
45 11 ADDR10
TS_IN_SYN ADDR8
46 12
TS_IN0
47 13 ADDR13
TS_IN1
ADDR14
48 14
TS_IN2 /WR_EN
49 15
TS_IN3
50 16 /IRQA
VCC VCC C906 0.1uF
51 17
VPP CI
R926 0 OPT 52 18 VPP R938 0 OPT
TS_IN4 TS_IN_VAL
53 19
TS_IN5
54 20 TS_IN_CLK
TS_IN6 ADDR12
55 21
TS_IN7
56 22 ADDR7
TS_OUT_CLK ADDR6
57 23
CI_RESET
58 24 ADDR5
CI_WAIT ADDR4
59 25
INPACK
60 26 ADDR3
REG
ADDR2
61 27
TS_OUT_VAL ADDR1
62 28
TS_OUT_SYN
63 29 ADDR0
TS_OUT0 DAT0 CI_A_DATA[0]
64 30
TS_OUT1
65 31 DAT1 CI_A_DATA[1]
TS_OUT2 DAT2 CI_A_DATA[2]
66 32
CI
/CI_DET2 R937
R928 100 67 33 /IO_BIT 10K
GND GND OPT
68 34
G2 69 G1
CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
CI_DATA[0-7]
CI_A_DATA[0] AR904 0 CI_DATA[0]
CI
CI_A_DATA[1] CI_DATA[1]
CI_A_DATA[2] CI_DATA[2]
CI_A_DATA[3] CI_DATA[3]
CI_A_DATA[4] AR905 0 CI_DATA[4]
CI
CI_A_DATA[5] CI_DATA[5]
CI_A_DATA[6] CI_DATA[6]
CI_A_DATA[7] CI_DATA[7]
CI_ADDR[0-14]
CI_A_ADDR[0] AR906 0 CI_ADDR[0]
CI
CI_A_ADDR[1] CI_ADDR[1]
CI_A_ADDR[2] CI_ADDR[2]
CI_A_ADDR[3] CI_ADDR[3]
CI_A_ADDR[4] CI_ADDR[4]
AR907 0 CI
CI_A_ADDR[5] CI_ADDR[5]
CI_A_ADDR[6] CI_ADDR[6]
CI_A_ADDR[7] CI_ADDR[7]
CI_A_ADDR[8] AR908 0 CI_ADDR[8]
CI
CI_A_ADDR[9] CI_ADDR[9]
CI_A_ADDR[10] CI_ADDR[10]
CI_A_ADDR[11] CI_ADDR[11]
CI_A_ADDR[12] AR909 0 CI_ADDR[12]
CI
CI_A_ADDR[13] CI_ADDR[13]
CI_A_ADDR[14] CI_ADDR[14]
CI_A_DATA[0-7]
/PCM_CE1
CI_A_ADDR[10]
CI_A_ADDR[11]
CI_A_ADDR[9]
CI_A_ADDR[8]
CI_A_ADDR[13]
R941 22
/PCM_OE
CI_A_ADDR[14]
R942 22
/PCM_WE
R940 22 CI
/PCM_IRQA
C907
CI
0.1uF
16V
CI_A_ADDR[12]
CI_A_ADDR[7]
CI_A_ADDR[6]
CI_A_ADDR[5]
CI_A_ADDR[4]
CI_A_ADDR[3]
CI_A_ADDR[2]
CI_A_ADDR[1]
CI_A_ADDR[0]
+5V_CI_ON
MID_MAIN_CI 2011.11.21
13
LGE Internal Use Only