JVC DR-MV1SUC Service Manual page 55

DIGITAL BLOCK DIAGRAM
0 2 DIGITAL
VIDEO IF
SW5V, SW12V, D5V, D3.3V
TO
D2.5V, D1.8V, V3.3V
JUNCTION
(VIDEO)
AO_IEC958, AI_D[0], A_MUTE2[H], K_BUS_CLK
CN7108
K_BUS_REQ, SYS_RESET[L], K_BUS_IN/OUT
AO_SCLK, AO_MCLKO, AO_FSYNC, DAC_RST[L]
DAC_SCL, DAC_SDA, AO_D[0], A_DAC_CS
CIN
TO
JUNCTION Q1008
VYIN
Y
(VIDEO) SW
CN7109
YV_OUT
C_OUT
CB_OUT
CR_OUT C
Y Cb Cr
MEDIA PROCESSOR
TO
JLIP_TX
JUNCTION
JLIP_RX
(VIDEO)
CN7105
UART2_TX
UART2_RX
OPEN
1394PFY
3 6
JACK
TPA+
TPA-
IC1801
TPB+
TPB-
1394
IEEE1394
Controller
FLASH
MADD[1-5]
IC1201
MADD[6-22]
Flash
E5_RESET[L]
memory
LH_AR[6] to LH_AR[21]
IC1203
MADD[6-21]
IC1204
ALE
Transparent
MADD[1-5]
MADD[6-22]
E5_RESET[L]
FOR JIG
UART2_TX, UART2_RX
VI_D[2-9], VIDEO_RST[L]
C IC1001
VO_D[0-15], SPI_MOSI
VIDEO_27M, VIDEO_CS
Video
VIDEO_MUTE[H], SPI_CLK
VIDEO_RXD
Y Controller
AP, A0 to A9,DQ0 to DQ15
UDQM, WE,CAS, RAS
Q1002 to Q1005
IC1002
BUF
SDRAM
VI_D[2-9], VO_D[0-15]
SDRAM_DQ[0- 31]
SDRAM_A[0-12]
SDRAM_A[14-17]
SDRAM_DQS[0] to [3]
SDRAM_DQM[0] to [3]
SDRAM_CLK[0], SDRAM_CLK[1]
SDRAM_CLK_L[0], SDRAM_CLK_L[1]
SDRAM_CKE, SDRAM_RAS_L
SDRAM_CAS_L, SDRAM_WE_L
IC1401
Media
VIDEO_RXD, VIDEO_CS
PHY_RESET[L]
Processor VIDEO_27M, AO_SCLK, AO_FSYNC
PHY_LREQ
AO_MCLKO, AO_IEC958, AO_D[0]
PHY_CLK
AI_D[0], SPI_MOSI, SPI_CLK
PHY_CNA
DAC_SCL, DAC_SDA, A_DAC_CS
PHY_CTL[0]
DAC_RST[L], VIDEO_RST[L], VIDEO_MUTE[H]
PHY_CTL[1]
PHY_DATA[0-7]
PHY_LPS
PHY_LINK_ON
3.3V --> 5.0V
5.0V --> 3.3V
RD/WR[L]
OE[L]/LDS[L]
CS[0]
MADD[1-5]
ATA_RESET, ATA_DAT[0-15], ATA_DMARQ
ATA_IORDY, ATA_INTRQ, ATA_DIOW[L]
ATA_DIOR[L], ATA_DMAACK[L], ATA_ADD[0] to [4]
RD/WR[L]
OE[L]/LDS[L]
CS[0]
MADD[1-5]
ALE
VI_D[2-9]
VO_D[0-15]
VIDEO_27M
A_MUTE2[H]
K_BUS_CLK
IC1404
K_BUS_REQ
SYS_RESET[L]
IC1405
K_BUS_IN/OUT
2-63 2-64
DDR RAM
IC1601
SDRAM_DQ[0-15] DDR_DQ[0-15]
RA1609 IC1603
to DDR SDRAM
RA1612
IC1602
RA1613
SDRAM_DQ[16-31] DDR_DQ[16-31]
IC1604
to
DDR SDRAM
RA1616
DDR_A[0-12]
DDR_BA[0]
RA1625
SDRAM_A[0-12]
DDR_BA[1]
SDRAM_A[14-17]
DDR_CS[0]
to
RA1628
SDRAM_CKE DDR_CKE
SDRAM_RAS_L DDR_RAS_L
R1601
SDRAM_CAS_L DDR_CAS_L
SDRAM_WE_L DDR_WE_L
to
R1604
SDRAM_CLK[0]
SDRAM_CLK[1]
R1613
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
to
R1616
RA1653
SDRAM_DQM[0] to [3]
SDRAM_DQS[0] to [3]
to
R1660
ATAPI IF
ATA_RESET
RA2201
ATA_DAT[0-15]
to
RA2205
ATA_DIOW[L]
ATA_DIOR[L]
ATA_DMAACK[L]
ATA_ADD[0] to [4]
ATA_DMARQ
ATA_IORDY
ATA_INTRQ RA2206
RA2207
DDR_CLK[0]
DDR_CLK[1]
DDR_CLK_L[0]
DDR_CLK_L[1]
DDR_DQM[2],[3]
DDR_DQS[2],[3]
DDR_DQM[0],[1]
DDR_DQS[0],[1]
HD_AT[0] to [15]
RSTATA
TO
DVD
Recorder
Unit
DMARQ, DIOW, DIOR
IORDY, DMACK, INT_ATA
ATA_A0, ATA_1,ATA_A2
CS1FX, CS3FX