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Sparing for Storage Protect Keys: The robust confi guration
of the Storage Protect Keys has been enhanced with chip
sparing. Already a triple-array with parity protection and
voting, the Key structure for z890 has added sparing, simi-
lar to Main Memory chip sparing, to further enhance the
availability of this critical function.
Failure Containment for the Memory Bus Adapter (MBA):
Memory Bus Adapters are designed to provide the critical
link between the z890 Processor Units and the I/O subsys-
tem. The Model A04 has two MBAs. In the unlikely event of
a catastrophic failure of an MBA chip, the z890 is designed
to isolate the failure of that chip such that the remaining
MBA chips continue to operate. This helps minimize the
impact of a failure and allows for scheduling maintenance.
Enhanced Firmware Simulation: The z890 process for
design, development, and test of Licensed Internal Code
(LIC) has been signifi cantly enhanced with the use of
simulation to improve quality and early availability. Virtu-
ally every action/reaction of the code can be tested with
the simulated hardware/code of the rest of the server. The
result is to discover and correct design errors much earlier
in the process.
These new features, together with legacy features such
as high levels of recovery, concurrent processor upgrade,
concurrent memory upgrade, concurrent I/O upgrade, and
concurrent maintenance for hardware and LIC give the
z890 a very impressive RAS structure.
Parallel Sysplex Cluster Technology
Parallel Sysplex clustering was designed to bring the
power of parallel processing to business-critical zSeries
and S/390 applications. A Parallel Sysplex cluster consists
of up to 32 z/OS and/or OS/390 images coupled to one or
more Coupling Facilities (CFs or ICFs) using high-speed
specialized links for communication. The Coupling Facili-
ties, at the heart of the Parallel Sysplex cluster, enable
high speed, read/write data sharing and resource sharing
among all the z/OS and OS/390 images in a cluster. All
images are also connected to a Sysplex Timer
time synchronization.
CF
Parallel Sysplex Resource Sharing enables multiple
system resources to be managed as a single logical
resource shared among all of the images. Some examples
of resource sharing include JES2 Checkpoint, GRS "star,"
and Enhanced Catalog Sharing; all of which provide sim-
plifi ed systems management, increased performance
and/or scalability. For more detail, please see S/390 Value
of Resource Sharing White Paper – GF22-5115 on the
Parallel Sysplex home page at ibm.com/servers/eserver/
zseries/pso.
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