Pin No.
Pin Name
93
S1DI
94
BCK
95
LRCK
96
LOCK
97
V
98
VAR
99
REF
100
PD
I/O
I
Serial data input of 1 sampling, 2 channel.
I
Bit clock input of the serial input/output data.
I
Sampling clock input of the serial input/output data.
O
Error output of the PLL unlock.
O
Frequency divider output for the PLL.
I
PLL phase comparator variable input
I
PLL phase comparator reference input
O
PLL phase comparator charge pump output
– 9 –
Pin Description