Sharp R-520DK Service Manual page 26

R - 5 2 0 D K
R -520DW
R - 5 3 0 D K
R -530DW
Pin No. Signal
50 P37
51 COM0 OUT
52 COM1 OUT
53 COM2 OUT
54 COM3 OUT
55 BIAS
56 VLC0
57-58
VLC1-VLC2
59 VSS0
60-95 S0-S35 OUT
96-99 P83-P80 OUT
LSI(IXA037DR) : R-530DK/DW
The I/O signal of the LSI(IXA037DR) is detailed in the following table.
Pin No. Signal
1-2 P26-P27 OUT
3-5 P70-P72 OUT
6 IC
7 X2 OUT
8 X1
9 VDD1
10 XT1
I/O
IN To input signal which communicates the door open/close information to LSI.
Door close "H" level signal (0V). Door open "L" level signal (-5V).
Common data signal: COM2.
Connected to LCD signal COM2.
Common data signal: COM1.
Connected to LCD signal COM1.
Common data signal: COM0.
Connected to LCD signal COM0.
Terminal not used.
IN Power source voltage : GND(0V).
IN Power source voltage input terminal.
Standard voltage for LCD. Connected to GND.
IN Power source voltage input terminal.
Standard voltage for LCD.
IN Power source voltage: -5.0V.
The power source voltage to the LSI is input to VSS0 terminal. Connected toVC.
Segment data signal.
Connected to LCD.
The relation between signals are as follows:
LSI signal (Pin No.)
S0 (60) ................................... SEG 0
S1 (61) ................................... SEG 1
S2 (62) ................................... SEG 2
S3 (63) ................................... SEG 3
S4 (64) ................................... SEG 4
S5 (65) ................................... SEG 5
S6 (66) ................................... SEG 6
S7 (67) ................................... SEG 7
S8 (68) ................................... SEG 8
S9 (69) ................................... SEG 9
S10 (70) .................................. SEG 10
S11 (71) .................................. SEG 11
S12 (72) .................................. SEG 12
S13 (73) .................................. SEG 13
S14 (74) .................................. SEG 14
S15 (75) .................................. SEG 15
S16 (76) .................................. SEG 16
S17 (77) .................................. SEG 17
Terminal not used.
I/O
Terminal not used.
Terminal not used.
IN Connected to VC.
Internal clock oscillation output.
Output to control oscillation input to X2.
IN Internal clock oscillation frequency control input setting.
The internal clock frequency is set by inserting the ceramic filter oscillation circuit with
respect to X1.
IN Power source voltage: GND(0V).
The power source voltage to drive LSI is input to VDD1 terminal.
IN Connected to GND.
Description
LCD (Pin No.) LSI signal (Pin No.)
S18 (78) ................................. SEG 18
S19 (79) ................................. SEG 19
S20 (80) ................................. SEG 20
S21 (81) ................................. SEG 21
S22 (82) ................................. SEG 22
S23 (83) ................................. SEG 23
S24 (84) ................................. SEG 24
S25 (85) ................................. SEG 25
S26 (86) ................................. SEG 26
S27 (87) ................................. SEG 27
S28 (88) ................................. SEG 28
S29 (89) ................................. SEG 29
S30 (90) ................................. SEG 30
S31 (91) ................................. SEG 31
S32 (92) ................................. SEG 32
S33 (93) ................................. SEG 33
S34 (94) ................................. SEG 34
S35 (95) ................................. SEG 35
Description
24
LCD (Pin No.)