Sony STR-DA7100ES Service Manual page 59

Pin No. Pin Name
78 OVDD
79 OVSS
80 to 83 MA3, MA4, MA2, MA5
84 OVDD
85 OVSS
86 to 89 MA1, MA6, MA0, MA7
90 OVSS
91 (IVSS) TEST5
92 CVSS
93 OVDD
MA10, MA8,
94 to 97
MA11, MA9
98 OVDD
99 OVSS
100 RAS
101 (CKE) DQM
102 CAS
103 MCLK
104 WE
105 TEST3
106 TEST4
107 OVSS
108 OVDD
109 CVDD
110 to 113 MD7, MD8, MD6, MD9
114 OVDD
115 OVSS
MD5, MD10,
116 to 119
MD4, MD11
120 OVDD
121 OVSS
MD3, MD12,
122 to 125
MD2, MD13
126 OVSS
127 CVSS
128 OVDD
MD1, MD14,
129 to 132
MD0, MD15
133 SLV
134 RFFO (CSB)
135 SDA
136 SCL
137 SRN
138 OVSS
139 CVDD
140 PLL VDD
141 VPDX (CPOUT)
142 TEST6 (VCOIN)
143 PLL_GND
144 IVDD
I/O
- Power supply terminal (+3.3V) (for I/O)
- Ground terminal (for I/O)
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V) (for I/O)
- Ground terminal (for I/O)
O Address signal output to the SD-RAM
- Ground terminal (for I/O)
- Ground terminal (for I/O)
- Ground terminal (for core)
- Power supply terminal (+3.3V) (for I/O)
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V) (for I/O)
- Ground terminal (for I/O)
O Row address strobe signal output to the SD-RAM
O Data mask signal output to the SD-RAM
O Column address strobe signal output to the SD-RAM
O Serial data transfer clock signal output to the SD-RAM
O Write enable signal output to the SD-RAM
I Terminal for test Fixed at "L" in this set
I Terminal for test Fixed at "L" in this set
- Ground terminal (for I/O)
- Power supply terminal (+3.3V) (for I/O)
- Power supply terminal (+2.5V) (for core)
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+3.3V) (for I/O)
- Ground terminal (for I/O)
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+3.3V) (for I/O)
- Ground terminal (for I/O)
I/O Two-way data bus with the SD-RAM
- Ground terminal (for I/O)
- Ground terminal (for core)
- Power supply terminal (+3.3V) (for I/O)
I/O Two-way data bus with the SD-RAM
MPU interface slave address setting terminal
I
Slave address setting: 0 x 72 when SLV is "0", 0 x 70 when SLV is "1"
O MPEG flag (repeat first field flag) output terminal Not used
I/O Two-way data bus with the HDMI controller
I Serial data transfer clock signal input from the HDMI controller
I System reset signal input from the HDMI controller "L": reset
- Ground terminal (for I/O)
- Power supply terminal (+2.5V) (for core)
- Power supply terminal (+2.5V) (for PLL)
- Not used
I Terminal for test Fixed at "L" in this set
- Ground terminal (for I/O)
- Power supply terminal (+3.3V) (for I/O)
STR-DA7100ES
Description
59