Sanyo DC-DA3300M Service Manual page 14

IC BLOCK DIAGRAM & DESCRIPTION
IC251 LC72723M (RDS Demodulation LSI)
VREF
Vdda
REFERENCE
VOLTAGE
Vssa
ANTIALIASING
MPXIN
FILTER
TEST TEST
16 15 14 13 12
1 2 3 4 5
IC443 BA7755A (Rec/Play Switch)
1 2 3
FLOUT CIN
VREF
57kHz
BPF
SMOOTHING
(SCF)
FILTER
CLK(4.332MHz)
OSC
XIN
PIN NO. PIN NAME I/O
1 VREF
2 MPXIN
5 FLOUT
6 CIN
11 10 9
3 Vdda
4 Vssa
8 XOUT
9 XIN
7 TEST
12 MODE
6 7 8
13 RST
14 RDDA
15 RDCL
RDS-ID/
16
READY
11 Vddd
10 Vssd
4 5
+
PLL
(57kHz)
-
XOUT
Description
O Reference Voltage Output (Vdda/2)
I Base Band (Maltiplex) Signal Input
O Sub Careea Output (Filter Output)
I Sub Careea Input (Comparator Input)
- Analog System Power Supply (+5V)
- Analog System Ground
O Crystal Oscillator Output (4.332MHz)
Crystal Oscillator Input (External Reference Signal Input)
Test Input
I
Reading Mode Setting (0: Master, 1: Slave)
RDS-ID/RAM Reset (Straight Polarity)
O RDS Data Output
RDS Clock Output (Master Mode) /
I/O
RDS Clock Input (Slave Mode)
O RDS-ID/READY Output (Negative Polarity)
- Digital System Power Supply (+5V)
- Digital System Ground
IC446 KIA7805API (Regulator)
1 2 3
- 13 -
CLOCK
RECOVERY
(1187.5Hz)
DATA
DECODER
RAM
(128bit)
RDS-ID
DETECT
1. INPUT
2. COMMON
3. OUTPUT
Vddd
Vssd
RDDA
RDCL
MODE
RST
RDS-ID/
READY