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B2
TE4P
TE4P
B1
TE4N
TE4N
B3
TD4P
TD4P
C3
TD4N
TD4N
C1
TCLK4P
TCLK4P
C2
TCLK4N
TCLK4N
D2
TC4P
TC4P
D1
TC4N
TC4N
D3
TB4P
TB4P
E3
TB4N
TB4N
E1
TA4P
TA4P
E2
TA4N
TA4N
F2
TE3P
TE3P
F1
TE3N
TE3N
F3
TD3P
TD3P
G3
TD3N
TD3N
G1
TCLK3P
TCLK3P
G2
TCLK3N
TCLK3N
H2
TC3P
TC3P
H1
TC3N
TC3N
H3
TB3P
TB3P
J3
TB3N
TB3N
J1
TA3P
TA3P
J2
TA3N
TA3N
K2
TE2P
TE2P
K1
TE2N
TE2N
K3
TD2P
TD2P
L3
TD2N
TD2N
L1
TCLK2P
TCLK2P
L2
TCLK2N
TCLK2N
M2
TC2P
TC2P
M1
TC2N
TC2N
M3
TB2P
TB2P
N3
TB2N
TB2N
N1
TA2P
TA2P
N2
TA2N
TA2N
P2
TE1P
TE1P
P1
TE1N
TE1N
P3
TD1P
TD1P
R3
TD1N
TD1N
R1
TCLK1P
TCLK1P
R2
TCLK1N
TCLK1N
T2
TC1P
TC1P
T1
TC1N
TC1N
T3
TB1P
TB1P
U3
TB1N
TB1N
U1
TA1P
TA1P
U2
TA1N
TA1N
Serial Flash
2MBit
+3.3V_3D
IC702
C735
W25X20BVSNIG
0.1uF
SPI_CSZ
16V
CS
VCC
1
8
SPI_DO
DO
HOLD
2
7
WP
CLK
3
6
SPI_CK
C
GND
DIO
4
5
SPI_DI
B
Q703
FLASH_WP
KRC103S
READY
E
LG8300_RESET
+3.3V_3D
SW700
JTP-1127WEM
R772
R757
0
10K
1
2
LG8300_RESET
C737
0.1uF
3
4
16V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
RA1N
RA1P
RB1N
RB1P
RC1N
RC1P
RCLK1N
RCLK1P
RD1N
RD1P
RE1N
RE1P
RA2N
RA2P
IC700
RB2N
RB2P
RC2N
RC2P
RCLK2N
LG8300
RCLK2P
RD2N
RD2P
RE2N
RE2P
CLK_XIN
CLK_XOUT
PO_RST_N
LR_SYNC
EMITTER_PULSE
EJTAG
+3.3V_3D
R776
3.3K
R763
R765
3.3K
3.3K
READY
R768
R761
3.3K
+1.8V
3.3K
R764
3.3K
/JTAG_TRST
TP1
JTAG_TDI
TP2
JTAG_TDO
TP3
JTAG_TMS
TP4
R998
JTAG_TCLK
4.7K
R759
TP5
0
1%
TP6
R999
R770
4.7K
1K
1%
Close to LG8300
+3.3V_3D
READY
READY
READY
READY
READY
R745
R747
R749
R751
R753
3.3K
3.3K
3.3K
3.3K
3.3K
BOOT_SEL
TMODE[3]
C818
TMODE[2]
C791
TMODE[1]
C798
TMODE[0]
C756
R746
R748
R750
R752
R754
C763
3.3K
3.3K
3.3K
3.3K
3.3K
C770
C777
C781
C785
C790
C800
C808
C813
C757
C764
C771
U18
100
LVDS_DATA_1_A-
U17
R1438
LVDS_DATA_1_A+
T18
100
LVDS_DATA_1_B-
T17
R1439
LVDS_DATA_1_B+
R18
100
LVDS_DATA_1_C-
R17
R896
LVDS_DATA_1_C+
P18
100
LVDS_CLK_1-
R894
+1.0V
P17
LVDS_CLK_1+
N18
L704
100
LVDS_DATA_1_D-
N17
R891
BLM18PG121SN1D
LVDS_DATA_1_D+
M18
100
LVDS_DATA_1_E-
R883
C820
M17
LVDS_DATA_1_E+
C795
C803
L18
100
LVDS_DATA_2_A-
L17
R878
C811
LVDS_DATA_2_A+
C828
K18
100
LVDS_DATA_2_B-
R845
K17
C821
LVDS_DATA_2_B+
+3.3V_3D
J18
100
L705
LVDS_DATA_2_C-
R895
J17
BLM18PG121SN1D
LVDS_DATA_2_C+
H18
100
LVDS_CLK_2-
R874
C794
H17
LVDS_CLK_2+
G18
C758
100
LVDS_DATA_2_D-
R840
C765
G17
LVDS_DATA_2_D+
F18
C778
100
LVDS_DATA_2_E-
R897
C772
F17
LVDS_DATA_2_E+
C782
A17
B18
B17
L712
BLM18PG121SN1D
V2
C832
V3
C829
R1452
0
C831
LG8300_RESET
R1450
C833
L706
0
C796
3D_L/R_SYNC
BLM18PG121SN1D
C804
C812
C815
C816
C836
C835
C817
DDR_VREF_LG8300
C837
C838
C792
C760
C767
C774
C779
C783
C787
C793
C802
C810
C814
+1.8V
DDR_VREF_LG8300
DDR_VREF_DDR
R996
4.7K
1%
R997
4.7K
1%
C843
C842
C840
C841
0.1uF
1000pF
0.1uF
1000pF
Close to DDR2(IC701)
IC700
+1.0V
LG8300
A2
GND_0
F6
F5
VDD10_1
GND_1
6.3V
10uF
F13
F7
VDD10_2
GND_2
G6
F8
6.3V
10uF
VDD10_3
GND_3
16V
0.1uF
G7
F9
VDD10_4
GND_4
G8
F10
16V
0.1uF
VDD10_5
GND_5
16V
0.1uF
G9
F11
VDD10_6
GND_6
G10
F12
16V
0.1uF
VDD10_7
GND_7
16V
0.1uF
G11
F14
VDD10_8
GND_8
G12
G5
16V
0.1uF
VDD10_9
GND_9
16V
0.1uF
G13
G14
VDD10_10
GND_10
H6
G16
16V
0.1uF
VDD10_11
GND_11
H13
H7
16V
0.1uF
VDD10_12
GND_12
16V
0.1uF
J6
H8
VDD10_13
GND_13
J13
H9
16V
0.1uF
VDD10_14
GND_14
16V
0.1uF
K6
H10
VDD10_15
GND_15
K13
H11
16V
0.1uF
VDD10_16
GND_16
16V
0.1uF
L6
H12
VDD10_17
GND_17
L7
H14
VDD10_18
GND_18
L8
H15
VDD10_19
GND_19
L9
H16
VDD10_20
GND_20
L10
J7
VDD10_21
GND_21
L11
J8
VDD10_22
GND_22
L12
J9
VDD10_23
GND_23
L13
J10
VDD10_24
GND_24
M6
J11
VDD10_25
GND_25
M13
J12
VDD10_26
GND_26
+1.0V_LTX
J14
GND_27
6.3V
10uF
H5
J15
LTX_VDD10_1
GND_28
J5
J16
16V
0.1uF
LTX_VDD10_2
GND_29
16V
0.1uF
K5
K7
LTX_VDD10_3
GND_30
L5
K8
16V
0.1uF
LTX_VDD10_4
GND_31
16V
0.1uF
M5
K9
LTX_VDD10_5
GND_32
K10
16V
0.1uF
GND_33
K11
GND_34
E5
K12
VDD33_1
GND_35
+3.3V_VDD
E6
K14
VDD33_2
GND_36
6.3V
10uF
E7
K15
VDD33_3
GND_37
E8
K16
16V
0.1uF
VDD33_4
GND_38
16V
0.1uF
E9
L14
VDD33_5
GND_39
E10
L15
16V
0.1uF
VDD33_6
GND_40
16V
0.1uF
E11
M7
VDD33_7
GND_41
E12
M8
16V
0.1uF
VDD33_8
GND_42
E13
M9
VDD33_9
GND_43
E14
M10
VDD33_10
GND_44
E15
M11
VDD33_11
GND_45
F15
M12
VDD33_12
GND_46
G15
M14
VDD33_13
GND_47
+3.3V_LRX
M15
GND_48
L16
N5
6.3V
10uF
LRX_AVDD33_1
GND_49
16V
0.1uF
N16
N6
LRX_AVDD33_2
GND_50
N15
16V
0.1uF
GND_51
+3.3V_LTX
E4
P5
LTX_AVDD33_1
GND_52
G4
P11
6.3V
10uF
LTX_AVDD33_2
GND_53
16V
0.1uF
L4
R4
LTX_AVDD33_3
GND_54
N4
R14
16V
0.1uF
LTX_AVDD33_4
GND_55
16V
0.1uF
J4
LTX_AVDD33_5
M16
16V
0.1uF
LRX_AVSS33_1
16V
0.1uF
P16
LRX_AVSS33_2
T4
6.3V
10uF
DDR_VREF0
R11
16V
0.1uF
F4
DDR_VREF1
LTX_AVSS33_1
16V
0.1uF
V17
H4
DDR_VREF2
LTX_AVSS33_2
K4
16V
0.1uF
LTX_AVSS33_3
N7
M4
DDR_VDDQ_1
LTX_AVSS33_4
N8
P4
+1.8V
DDR_VDDQ_2
LTX_AVSS33_5
N9
DDR_VDDQ_3
N10
6.3V
10uF
DDR_VDDQ_4
6.3V
10uF
N11
C17
DDR_VDDQ_5
DDRPLL_AVSS33
+3.3V_3D
N12
D17
16V
0.1uF
DDR_VDDQ_6
SYSPLL_AVSS33
16V
0.1uF
N13
E16
DDR_VDDQ_7
ADPLL_AVSS33
L707
N14
F16
16V
0.1uF
BLM18PG121SN1D
DDR_VDDQ_8
SSPLL_AVSS33
16V
0.1uF
P6
+3.3V_PLL
DDR_VDDQ_9
P7
C18
16V
0.1uF
C834
0.1uF
DDR_VDDQ_10
DDRPLL_AVDD33
P8
D18
16V
0.1uF
C773
0.1uF
DDR_VDDQ_11
SYSPLL_AVDD33
16V
0.1uF
P9
E17
C766
0.1uF
DDR_VDDQ_12
SSPLL_AVDD33
P10
E18
16V
0.1uF
C759
0.1uF
DDR_VDDQ_13
ADPLL_AVDD33
16V
0.1uF
P12
C839
10uF
DDR_VDDQ_14
P13
16V
0.1uF
DDR_VDDQ_15
P14
DDR_VDDQ_16
P15
DDR_VDDQ_17
RF Emiiter Interface
P704
12507WS-12L
+3.3V
+3.3V
1
READY
READY
READY
R1454
R1481
R1482
2.7K
2.7K
2.7K
2
3
3D_RF_RXD
ZD701
5.6B
4
3D_RF_TXD
ZD702
5.6B
R1456
100
5
3D_RFMODULE_RESET
R1483
100
6
3D_RFMODULE_DC
ZD707
R1484
5.6B
100
7
3D_RFMODULE_DD
ZD708
R1477
5.6B
1K
8
R1453 100
9
3D_RF_GPIO0
ZD703
5.6B
R1469 100
10
3D_RF_GPIO1
ZD704
5.6B
R1470 100
11
3D_RF_GPIO2
ZD705
5.6B
R1455 22
12
3D_L/R_SYNC
ZD706
5.6B
R1478
R1479
R1480
13
1K
1K
1K
GP2R_S7R
2010-08-31
3DF
7
LGE Internal Use Only
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