Chipset - Asus P5GD1-FM User Manual

2.4.3 2.4.3 2.4.3

Chipset

Chipset Chipset
2.4.3 2.4.3 Chipset Chipset
The Chipset menu allows you to change the advanced chipset settings.
Select an item then press <Enter> to display the sub-menu.
Advanced Chipset Settings
Configure DRAM Timing by SPD
Booting Graphic Adapter Priority
PCI-EX Ports Configuration
VC1 for Azalia & Root Ports
Advanced Chipset Settings Advanced Chipset Settings Advanced Chipset Settings
Advanced Chipset Settings Advanced Chipset Settings
Configure DRAM Timing by SPD [Enabled]
When this item is enabled, the DRAM timing parameters are set
according to the DRAM SPD (Serial Presence Detect). When disabled,
you can manually set the DRAM timing parameters through the DRAM
sub-items. The following sub-items appear when this item is Disabled.
Configuration options: [Disabled] [Enabled]
D R A M C A S # L a t e n c y [ 3 C l o c k s ] D R A M C A S # L a t e n c y [ 3 C l o c k s ] D R A M C A S # L a t e n c y [ 3 C l o c k s ]
D R A M C A S # L a t e n c y [ 3 C l o c k s ] D R A M C A S # L a t e n c y [ 3 C l o c k s ]
Controls the latency between the SDRAM read command and the
time the data actually becomes available.
Configuration options: [3 Clocks] [2.5 Clocks] [2 Clocks]
D R A M R A S # P r e c h a r g e [ 4 C l o c k s ] D R A M R A S # P r e c h a r g e [ 4 C l o c k s ]
D R A M R A S # P r e c h a r g e [ 4 C l o c k s ] D R A M R A S # P r e c h a r g e [ 4 C l o c k s ] D R A M R A S # P r e c h a r g e [ 4 C l o c k s ]
Controls the idle clocks after issuing a precharge command to the
DDR SDRAM. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks]
[5 Clocks]
A S U S P 5 G D 1 - F M A S U S P 5 G D 1 - F M A S U S P 5 G D 1 - F M
A S U S P 5 G D 1 - F M A S U S P 5 G D 1 - F M
[Enabled]
[PCI Express/PCI]
[Disabled]
Enable or disable
DRAM timing.
2 - 1 9 2 - 1 9 2 - 1 9
2 - 1 9 2 - 1 9