Omega CIO-CTR10 User Manual page 11

Each CIO-CTR board is supplied with the InstaCal installation, calibration and test
package. Use it to guide the installation procedure.
described in chapter one (Quick Start).
The CIO-CTR family is fully supported by the powerful Universal Library package.
Details regarding installation and usage of the Universal Library software can be
found in the Universal Library documentation. Please note that InstaCal also creates a
configuration file required for programmers who use the Universal Library program-
ming libraries.
For those programmers writing drivers of their own, a complete register description
follows.
SOFTWARE
InstaCAL installation is
9
CONTROL & DATA REGISTERS
The CIO-CTR10 is composed of 2 AM9513 counter timer chips. The CIO-CTR05
contains one 9513. Each 9513 contains five counters of 16 bits each. Associated with
each counter are an input source, a count register, a load register, a hold register, an
output and a gate. The 9513 is extremely flexible and this flexibility can make it a
challenge to program the chip directly.
Unlike an Intel 8254 which has a single source, single gate and unique I/O address for
each counter, the 9513 is fully programmable and any counter may be internally con-
nected to any gate and receive it's counts from a number of sources. In addition, each
counter does not have a unique I/O address. The 9513 takes only two address per
chip, one of which is a data path to the counter's load and hold registers.
There is no 9513 register information in this manual. Those wishing to know more
about the AM9513 and its programming should request the manual from our technical
support group. As of this writing there is no charge for the manual.
However, we suggest that you use the Universal Library, rather than resort to pro-
gramming the 9513 directly. It is difficult to program and because programming sup-
port is available through the Universal Library, we cannot help with other 9513 pro-
gramming.
CIO-CTR10 & CIO-CTR05 ADDRESSES
The CIO-CTR is an I/O mapped expansion board. The CTR10 occupies 8 I/O
addresses and the CTR05 occupies 4 addresses.
The first address, or BASE ADDRESS, is determined by setting a bank of switches on
the board.
Most of the functions that this board is capable of performing can be acheived using
the Universal Library. Unless you have a good reason for direct register
manipulation, we suggest you use the Universal Library.
The register descriptions follow the format:
7 6 5
A7 A6 A5
CIO-CTR ARCHITECTURE
4 3 2 1
A4 A3 A2 A1
10
0
A0