Chapter 3. Block Diagram - Sony Vaio PCG-F340 Service Manual

North Module
PenII-256K 333/366/400MHz
MPM-12 BOARD
Processor Core with 256KB L2 cache
or
Celeron-128K 300/333/366MHz
Processor Core with 128KB L2 cache
H-PBGA 24 x 26 gr i d array at 615 leads
DC-DC
CONVERTER
PCI Dev #0
for
CPU Core/CPU IO
PCI Dev #4
PCI_AD[31:0]
MODEM module
PCI_CTRL
IFX-56 Board
MODEM CONN
MODEM CHIP
RJ11
(RH56LD- PCI)
ATF_INT
USB
POR T 0
CONN
Pr imar y IDE
Secondar y IDE
PCI Dev #1
MASTER
CD-ROM
HDD
EIO_SA[19:0]
EIO_SD[15:0]
DC-IN
EIO_CTRL
POWER
CONN
SUPPLY
FD
&
PRIMARY CHARGER
BATTERY
SW
BAT CONN DEVICE BAY1 CONN
SECOND
FDD
BATTERY Drive 0
MULTI-PURPOSE BAY
3-1
CHAPTER 3.
BLOCK DIAGRAM
14 M Oscillator
DCLKRD/WR
443 DX
SYSTEM CONTROLLER
On board memory
HOST-PCI BRIGE HOST
128Mbit SDRAM x4
MEMORY CONTROLLER
NORTH MODULE CONN 280pin
PCI_CLKs
ATF_INT
PIIX4E
48M
PCI-ISA BRIDGE
IDE
USB
R TC
OSC
14 M Oscillator
MAIN SYSTEM B O ARD
MBX- 15 BOARD
POWER CONTR OL
LCD(Panel)
LED
15"/14"/13.3"/13"
TFT / HPA
XGA 1024x768
48MHz
66 MHz
CLOCK
AB _Gp2
LCD CO NN
GENERATOR
33 MHz
LVDS
MEMORY BUS
DRIVER
CS[0,1]#
CS[2 ,3]#
8Byte
VIDEO CONTROLLER
SODIMM
(64Mbyte)
NM2200
x1
AB _Gp1
PCI Dev #2
AGP/PCI
PCI Dev #5
PCI- 1394
CXD19479Q
CARD BUS
PHY
RICOH
TSB21LV03A
RB5C478MK2
i.Link ( 4 pin ) CONN PCI Dev #3
RO-27 BOARD
FLASH
ULTRA I/ O
512Kx8
FDC37N958FR
KB CONN
REV.C
SUPER I/O
KBC w/EC
PSK
ROM INTERFACE
COMb
IrDA
AB_Gp3
AB_Gp2
ACCESS BUS
AB_Gp1
AB_Gp0
FAN
PCG-F3 Series
BLOCK DIAGRAM Rev . 0.9
[DIXON-256K/Celeron128K]
(66MHz FSB & No AGP)
PCGA-PRF1
Ext RGB
VGA
Port
DB-15
Replicator
CONN
DC-IN
CONN
VGA DB-15
LINE IN
24M
SPKR
Oscillator
PHONE
AMP
OUT
AC97
AMP
MIC IN
PCI_AD[31:0]
Internal
MIC
PCI_CTRL
PCI_CLKs
PC CARD
SLOT A
PC CARD
SLOT B
ExtendIO_SA[19:0]
EIO_SD[15:0]
EIO_CTRL
i.LINK
RJ-45
TRACK
14M
PAD
PS/2
USB <->
LPT1 Ether
COMa
Serial DB-9 x1
LT1237
PS /2 (0,1) x2
Pr inter (Paralell) x1
PIIX4E
USB x1
Printer (Paralell)
PS/2 (0)
Serial
CONN
CONN CONN
3-2
(END)
PCG-F340/F350/F360 (UC)