Figure 4. I/O Pins And Supported Ata Signals - Seagate Medalist 6540 Product Manual

22 Medalist 6540, 5130 and 3220 Product Manual, Rev. A
Drive pin #
Signal name
Reset –
1
2 Ground
3 DD7
4 DD8
5 DD6
6 DD9
7 DD5
8 DD10
9 DD4
10 DD11
11 DD3
12 DD12
13 DD2
14 DD13
15 DD1
16 DD14
17 DD0
18 DD15
19 Ground
(removed)
20
21 DMARQ
22 Ground
23 DIOW–:
STOP
24 Ground
DIOR – :
25
HDMARDY – :
HSTROBE
26 Ground
27 IORDY:
DDMARDY–:
DSTROBE
28 CSEL
DMACK –
29
30 Ground
31 INTRQ
IOCS16 –
32
33 DA1
PDIAG –
34
35 DA0
36 DA2
CS0 –
37
CS1 –
38
DASP –
39
40 Ground
Pins 28, 34 and 39 are used for master-slave communication (details shown below).
Drive 1 (slave) Drive 0 (master)
28
34
39

Figure 4. I/O pins and supported ATA signals

Host pin # and signal description
1 Hardware Reset
2 Ground
3 Host Data Bus Bit 7
4 Host Data Bus Bit 8
5 Host Data Bus Bit 6
6 Host Data Bus Bit 9
7 Host Data Bus Bit 5
8 Host Data Bus Bit 10
9 Host Data Bus Bit 4
10 Host Data Bus Bit 11
11 Host Data Bus Bit 3
12 Host Data Bus Bit 12
13 Host Data Bus Bit 2
14 Host Data Bus Bit 13
15 Host Data Bus Bit 1
16 Host Data Bus Bit 14
17 Host Data Bus Bit 0
18 Device Data (15:0)
19 Ground
(No Pin)
20
21 DMA Request
22 Ground
23 Device I/O Write:
Stop Ultra DMA Burst
24 Ground
25 Device I/O Read:
Host Ultra DMA Ready:
Host Ultra DMA Data Strobe
26 Ground
27 I/O Channel Ready
Device Ultra DMA Ready
Device Ulta DMA Data Strobe
28 Cable Select
29 DMA Acknowledge
30 Ground
31 Device Interrupt
32 Host 16 Bit I/O
33 Host Address Bus Bit 1
34 Passed Diagnostics
35 Device Address (2:0)
36 Device Address (2:0)
37 Chip Select (1:0)
38 Chip Select (1:0)
39 Drive Active / Slave Present
40 Ground
28 CSEL
PDIAG –
34
DASP–
39
Host
28
34
39