Maxim MAX9777 Manual page 15

Stereo 3W Audio Power Amplifiers with
The MAX9777 recognizes a STOP condition at any
point during the transmission except if a STOP condi-
tion occurs in the same high pulse as a START condi-
tion (Figure 5). This condition is not a legal I
at least one clock pulse must separate any START and
STOP condition.
REPEATED START Conditions
A REPEATED START (S
change of data direction on the bus. Such a change
occurs when a command word is required to initiate a
read operation. S may also be used when the bus
r
master is writing to several I
want to relinquish control of the bus. The MAX9777 ser-
ial interface supports continuous write operations with
or without an S condition separating them. Continuous
r
read operations require S
change in direction of data flow.
SCL
SDA
STOP
LEGAL STOP CONDITION
SCL
SDA
START
ILLEGAL EARLY STOP CONDITION
Figure 5. Early STOP Condition
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
Headphone Drive and Input Mux
Early STOP Conditions
2
C format;
) condition may indicate a
r
2
C devices and does not
conditions because of the
r
START
ILLEGAL
STOP
The acknowledge bit (ACK) is the ninth bit attached to
any 8-bit data word. The receiving device always gen-
erates ACK. The MAX9777 generates an ACK when
receiving an address or data by pulling SDA low during
the night clock period. When transmitting data, the
MAX9777 waits for the receiving device to generate an
ACK. Monitoring ACK allows for detection of unsuc-
cessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master should reattempt communica-
tion at a later time.
The bus master initiates communication with a slave
device by issuing a START condition followed by a 7-bit
slave address (Figure 6). When idle, the MAX9777
waits for a START condition followed by its slave
address. The LSB of the address word is the
Read/Write (R/W) bit. R/W indicates whether the master
is writing to or reading from the MAX9777 (R/W = 0
selects the write condition, R/W = 1 selects the read
condition). After receiving the proper address, the
MAX9777 issues an ACK by pulling SDA low for one
clock cycle.
The MAX9777 has a factory-/user-programmed
address. Address bits A6–A2 are preset, while A0 and
A1 is set by ADD. Connect ADD to either V
SCL, or SDA to change the last 2 bits of the slave
address (Table 2).
S A6 A5 A4
Figure 6. Slave Address Byte Definition
Table 2. MAX9777 I
ADD CONNECTION
GND
V
DD
SDA
SCL
Acknowledge Bit (ACK)
Slave Address
, GND,
DD
A3 A2 A1 A0 R/W
2
C Slave Addresses
2
I C ADDRESS
100 1000
100 1001
100 1010
100 1011
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