E05A15Ha Gate Array Functions - Epson LQ 1050 - B/W Dot-matrix Printer Technical Manual

2.3.3.2 E05A15HA Gate Array Functions

This gate array performs chip selection for the main components on the PEGX board, under the control
of the 78 10HG CPU. The gate array also outputs the lower address signals (AO through A7) for the ROM
and RAM using data from the CPU. In addition, the gate array controls the carriage motor and paper
feed motor, and drives the printhead and plunger solenoids.
Table 2-4 shows the pin assignments for the gate array. Refer to the Appendix for the details on the
gate
array.
Pin No. Signal Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
I
23
24
25
Table 2-4. Pin Function of GA (E05A15HA)
Direction
BANK O
BANK 1
Cs 1
P4
P3
P2
Po
OUT
OUT
CRC OUT
OUT
HD 1
OUT
HD8
OUT
Not used
OUT
OUT
Chip select signal for the gate array (7A):
OUT
Low active signal
OUT Chip select signal for the ST-RAM (6A):
Low active signal
Chip select signal for the ST-RAM (5A):
OUT
Low active signal
OUT Chip select signal for the P-RAM (4A):
Low active signal
Not used
Home Position (HP) signal input
IN
IN Paper End (PE) signal input
Friction/Tractor switch status input
IN
Friction mode: High
Tractor mode: Low
Not used
IN
Carriage motor driving signal
Printed driving signal
(Head Data 1-8)
—
Logic Ground
Function