Vizio P50HDM - 50" Plasma Panel Service Manual page 43

Figure 8-15 HDMI 9011 Block Diagram
TMDS Digital Core
The core performs 10-to-8-bit TMDS decoding on the audio and video data received from the
three TMDS differential data lines along with a TMDS differential clock. The TMDS core
supports link clock rates to 165MHz, including CE modes to 720p/1080i/1080p and PC modes
to XGA, SXGA and UXGA.
Active Port Detection
The PanelLink core detects an active TMDS clock and detects an actively toggling DE signal.
These states are accessible in register bits, useful for monitoring the status of the HDMI input
or for automatically powering down the receiver.
The +5V supply from the HDMI connector is used as a cable detect indicator. The SiI 9011
can monitor the presence of this +5V supply and, if and when necessary, provide a fast audio
mute without pops when it senses the HDMI cable pulled. The microcontroller can also poll
registers in the SiI9011 to check whether an HDMI cable is connected.
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