Related Manuals for TYAN TOMCAT I810E
Summary of Contents for TYAN TOMCAT I810E
- Page 15 2 LED Green 4 LED Yellow Ground 6 Power On/Off Switch 8 Ground 10 FP_SLP# IRRX 12 Ground Ground 14 KEY IRTX 16 IR PWR RESV 18 RESV +5 VSB Ground LED YEL LED GRN +5 VSB Ground +5 VSB Ground Ground +12V Speed...
- Page 16 Buzzer SpkDrv CD-L Ground Ground CD-R Enable Disable...
- Page 17 Locked Unlocked...
- Page 37 Function Moves from one box to the next Arrow keys Changes selections within a box Enter Opens highlighted selection...
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Page 42: Setting Option
Setting Option Optim al Default Fail-Safe Default Quick B o o t Enabled Enabled P rimary M aster A RM D Emulated as A uto A uto P rimary Slave ARM D Emulated as A uto A uto Seco ndary M aster A RM D Emulated as A uto A uto Seco ndary Slave ARM D Emulated as A uto... - Page 43 Setting Option Optimal Default Fail-Safe Default Flo ppy A ccess Co ntro l Read-Write Read-Write Hard Disk Access Co ntro l Read-Write Read-Write S.M .A.R.T. fo r Hard Disks Disabled Disabled B o o t Up Num-Lo ck P S/2 M o use Suppo rt Enabled Enabled P rimary Display...
- Page 44 S e tti n g De scription T he messages that AMI BIOS displays before boot ing t he system will appear BIOS on the system monit or Silent T he messages that AMI BIOS displays will not appear on t he syst em monitor Se tting De scription Force BIOS...
- Page 47 Setting Option Optimal Default Fail-Safe Default USB Function Enabled Enabled USB KB / M o use Legacy Suppo rt Disabled Disabled CPU Latency Timer Disabled Disabled DRA M P age Clo sing P o licy Clo sed Closed CD Hole Disabled Disabled M emo ry Hole...
- Page 48 Setting Option Optim al Default Fail-Safe Default Display Cache Windo w Size 64M B 64M B CPU Freq Select So ftware So ftware CPU Freq Ratio Initialize Display Cache M emo ry Enabled Enabled P aging M o de Co ntro l Open Open RAS to CAS...
- Page 49 Setting Description The CPU cycle is only deferred after being held in Snoop Stall for 31 clocks Enabled and after another ADS# signal has arrived. Disabled The CPU cycle is deferred immediately after receiving another ADS# signal.
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Page 52: Optim Al Default
Setting Option Optim al Default Fail-Safe Default P o wer M anagement M o de A PM AP M Suspend Time Out (M inute) Disabled Disabled P o wer B utto n M o de On / Off On / Off CPU Sleep P in Enable Enabled Enabled... - Page 53 Setting Option Optim al Default Fail-Safe Default ADVANCED SMI ENABLE CONTROLS Timer Overflow Enable Disabled Disabled Thermal SMI Enable Disabled Disabled PMI SMI Enable Disabled Disabled SW SMI Timer Enable Disabled Disabled TCO Logic SMI Enable Enabled Enabled ADVANCED RESOURCE EVENT CONTROLS RTC Resume Disabled Disabled...
- Page 57 Setting Option Optimal Default Fail-Safe Default P lug and P lay A ware O/S P CI Latency Timer (P CI Clo cks) P CI VGA P alette Sno o p Disabled Disabled A llo cate IRQ to P CI VGA P CI IDE BusM aster Disabled Disabled...
- Page 58 DM A Channel 1 P nP P nP DM A Channel 3 P nP P nP DM A Channel 5 P nP P nP DM A Channel 6 P nP P nP DM A Channel 7 P nP P nP IRQ3 P CI/P nP P CI/P nP...
- Page 61 Setting Option Optim al Default Fail-Safe Default Keybo ard Wake-up Functio n Enabled Enabled M o use Wake-up Functio n Enabled Enabled Super I/O Game P o rt 201h 201h * CP U Current Temperature * Vco re - CPU * Vcc +3.3V * Vcc +5V * Vcc +12V...
- Page 62 Setting Option Optim al Default Fail-Safe Default OnB o ard Serial P o rt1 3F8h 3F8h OnB o ard Serial P o rt2 Disabled Disabled Serial P o rt2 M o de * Duplex M o de Half OnB o ard P arallel P o rt P arallel P o rt M o de P arallel P o rt IRQ P arallel P o rt DM A Channel 3...