Related Manuals for Intel Arria V
Summarization of Contents
Overview of Cyclone V and Arria V SoC FPGA Design Guidelines
The SoC FPGA Designer's Checklist
A checklist for SoC FPGA designers to follow.
Overview of HPS Design Guidelines for SoC FPGA Design
Overview of HPS design guidelines for SoC FPGA design.
Overview of Board Design Guidelines for SoC FPGA Design
Overview of board design guidelines for SoC FPGA design.
Overview of Embedded Software Design Guidelines for SoC FPGA Design
Overview of embedded software design guidelines for SoC FPGA design.
Background: Comparison between Cyclone V SoC FPGA and Arria V SoC FPGA HPS Subsystems
Guidelines for Interconnecting the HPS and FPGA
Guidelines for connecting HPS and FPGA interfaces.
Design Guidelines for HPS portion of SoC FPGAs
Start your SoC-FPGA design here
Guidance on starting SoC FPGA design and topology.
Design Considerations for Connecting Device I/O to HPS Peripherals and Memory
Considerations for connecting device I/O to HPS peripherals and memory.
HPS Clocking and Reset Design Considerations
Guidelines for HPS clocking and reset design.
HPS EMIF Design Considerations
Design considerations for the HPS External Memory Interface (EMIF).
DMA Considerations
Considerations for Direct Memory Access (DMA) implementation.
Managing Coherency for FPGA Accelerators
Managing data coherency between FPGA accelerators and HPS.
IP Debug Tools
Tools for IP and system-level debugging in FPGA designs.
Board Design Guidelines for SoC FPGAs
Board Bring Up Considerations
Considerations for board bring-up procedures.
Boot and Configuration Design Considerations
Design considerations for boot and configuration processes.
Configuration
Details on traditional and HPS-initiated FPGA configuration flows.
Reference Materials
List of reference materials for further information.
Early System and Board Planning
Guidelines for early system and board planning, including power.
Design Considerations for HPS and FPGA Power Supplies for SoC FPGA devices
Design considerations for HPS and FPGA power supplies.
Pin Connection Considerations for Board Designs
Considerations for pin connections in board designs.
Power Analysis and Optimization
Guidelines for power analysis and optimization.
Boundary Scan for HPS
Guidelines for performing boundary scan tests on HPS I/O.
Design Guidelines for HPS Interfaces
Design guidelines for various HPS interfaces.
HPS EMAC PHY Interfaces
Design guidelines for HPS EMAC PHY interfaces.
USB Interface Design Guidelines
Design guidelines for USB interface operation.
QSPI Flash Interface Design Guidelines
Design guidelines for QSPI flash interface.
SD/MMC and eMMC Card Interface Design Guidelines
Design guidelines for SD/MMC and eMMC card interfaces.
NAND Flash Interface Design Guidelines
Design guidelines for NAND flash interface.
UART Interface Design Guidelines
Design guidelines for UART interface connection.
I2C Interface Design Guidelines
Design guidelines for I2C interface routing and pull-ups.
SPI Interface Design Guidelines
Design guidelines for SPI interface routing and slave select.
Embedded Software Design Guidelines for SoC FPGAs
Embedded Software for HPS: Design Guidelines
General design guidelines for embedded software on HPS.
Assembling the Components of Your Software Development Platform
Steps for assembling software development platform components.
Selecting an Operating System for Your Application
Factors for selecting an OS (Linux, RTOS, Bare Metal).
Using Symmetrical vs. Asymmetrical Multiprocessing (SMP vs. AMP) Modes
Comparison of SMP and AMP multiprocessing modes.
Assembling your Software Development Platform for Linux
Guidelines for assembling a software platform for Linux.
Golden System Reference Design (GSRD) for Linux
Details on the Golden System Reference Design for Linux.
GSRD for Linux Build Flow
Detailed build flow for the GSRD for Linux.
Linux Device Tree Design Considerations
Considerations for managing Linux Device Tree structure.
Assembling a Software Development Platform for a Bare-Metal Application
Guidelines for assembling a bare-metal application platform.
Assembling your Software Development Platform for a Partner OS or RTOS
Guidelines for assembling platforms for partner OS/RTOS.
Choosing Boot Loader Software
Information on choosing boot loader software.
Selecting Software Tools for Development, Debug and Trace
Guidance on selecting tools for development, debug, and trace.
Flash Device Driver Design Considerations
Considerations for flash device driver design.
HPS ECC Design Considerations
Design considerations for HPS ECC (Error Correction Code).
General ECC Design Considerations
General ECC design considerations for HPS subsystems.
ECC for Flash Memory
ECC considerations for flash memory operations.
HPS SDRAM Considerations
Considerations for HPS SDRAM configuration and debugging.
Using the Preloader To Debug the HPS SDRAM
Using the preloader to debug HPS SDRAM.
Access HPS SDRAM via the FPGA-to-SDRAM Interface
Accessing HPS SDRAM via the FPGA-to-SDRAM interface.
Support and Documentation
Support
Information on technical support for software and hardware.
Software Documentation
Information on software documentation resources.
Additional Information
Cyclone V and Arria V SoC Device Guidelines Revision History
Revision history for the device guidelines document.
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