Keysight M8132A 640 GSA/S User Manual
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Keysight M8132A 640 GSA/S User Manual

Keysight M8132A 640 GSA/S User Manual

Digital signal processor
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Summary of Contents for Keysight M8132A 640 GSA/S

  • Page 1 USER GUIDE...

  • Page 2: Warranty

    APPLICABLE LAW, KEYSIGHT DISCLAIMS under its standard commercial license, conditions are fully understood and ALL WARRANTIES, EITHER EXPRESS OR which is embodied in its End User License met. IMPLIED WITH REGARD TO THIS MANUAL Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 3: Safety Summary

    Failure to comply with these precautions or with specific warnings or operating instructions in the product manuals violates safety standards of design, manufacture, and intended use of the instrument. Keysight Technologies assumes no liability for the customer's failure to comply with these requirements. Product manuals are provided with your instrument on CD-ROM and/or in printed form.
  • Page 4 (safety ground) at the power outlet. Any interruption of the protective (grounding) conductor or disconnection of the protective earth terminal will cause a potential shock hazard that could result in personal injury. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 5: Instrument Markings

    The RCM mark is a registered trademark of the Australian Communications and Media Authority. The CSA mark is a registered trademark of the CSA International. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 6 Universal recycling symbol. This symbol indicates compliance with the China standard GB 18455-2001 as required by the China RoHS regulations for paper/fiberboard packaging. The Keysight email address is required by EU directives applicable to our product. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 7: Compliance And Environmental Information

    Product Category: With reference to the equipment types in WEEE Directive Annex I, this product is classed as a “Monitoring and Control instrumentation” product. Do not dispose in domestic household waste. To return unwanted products, contact your local Keysight office, or see http://about.keysight.com/en/companyinfo/environment/takeback.shtml for more information.

  • Page 9: Table Of Contents

    3 Soft Front Panel Launching the Soft Front Panel Command Line Arguments Communication Soft Front Panel Title Bar Menu Bar Lower Pane Errors List Window Status Bar Clock Tab IOs Tab Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 10 Braces Ellipsis Square Brackets Program Data Status Commands STATus:PRESet Status Byte Register Questionable Data Register Command Subsystem Reference Clock Status Subsystem Connection Status Subsystem Latency Calibration Commands :CALibrate:LATency:LCMPeriod :CALibrate:LATency:MODE :CALibrate:LATency[:STEP] :CALibrate:LATency:SPDelay Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 11 *ESE ESR? *OPC *OPC? *OPT? *RST *SRE[?] *STB? *TST? *LRN? *WAI? System Commands :SYSTem:ERRor[:NEXT]? :SYSTem:HELP:HEADers? :SYSTem:LICense:EXTended:LIST? :SYSTem:SET[?] :SYSTem:VERSion? :SYSTem:COMMunicate:*? :SYSTem:COMMunicate:INSTr[:NUMBer]? :SYSTem:COMMunicate:HISLip[:NUMBer]? :SYSTem:COMMunicate:SOCKet[:PORT]? :SYSTem:COMMunicate:TELNet[:PORT]? :SYSTem:COMMunicate:TCPip:CONTrol? :SYSTem:ERRor:COUNt? :SYSTem:LICense:LIST? :SYSTem:LICense:SUBScription:DATE? Time Base Commands :TIMebase:REFClock Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 12 Contents Instrument Commands :INSTrument:SLOT[:NUMBer]? :INSTrument:IDENtify :INSTrument:IDENtify:STOP :INSTrument:HWRevision? FPGA Access Commands :INSTrument:FPGA:UPDate :INSTrument:FPGA:RESet :INSTrument:FPGA:DIRect:DWORd[?] :INSTrument:FPGA:DIRect:BLOCk[?] :INSTrument:FPGA:GEARbox:CLEar :INSTrument:FPGA:GEARbox:STARt Current and Power Monitor Commands :INSTrument:MONitor:CURRent[:TOTal]? :INSTrument:MONitor:CURRent:MGTAVCC? :INSTrument:MONitor:CURRent:MGTAVTT? :INSTrument:MONitor:CURRent:VCCINT? :INSTrument:MONitor:POWer[:TOTal]? :INSTrument:MONitor:POWer:MGTAVCC? :INSTrument:MONitor:POWer:MGTAVTT? :INSTrument:MONitor:POWer:VCCINT? Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 13 Contents Sandbox Commands :INSTrument:SANDbox<M>:NAME? :INSTrument:SANDbox<M>:FNAMe? :INSTrument:SANDbox<M>:FVERsion? :INSTrument:SANDbox<M>:KID? :INSTrument:SANDbox<M>:SID? :INSTrument:SANDbox<M>:CONFigure :INSTrument:SANDbox<M>:RLISt? :INSTrument:SANDbox<M>:RINFo? :INSTrument:SANDbox<M>:PEEK? :INSTrument:SANDbox<M>:POKE :INSTrument:SANDbox<M>:SREad? :INSTrument:SANDbox<M>:SREad:BLOCk? :INSTrument:SANDbox<M>:SWRite :INSTrument:SANDbox<M>:SWRite:BLOCk :INSTrument:SANDbox<M>:MLISt? :INSTrument:SANDbox<M>:MINFo? :INSTrument:SANDbox<M>:MREad? :INSTrument:SANDbox<M>:MREad:BLOCk? :INSTrument:SANDbox<M>:MWRite :INSTrument:SANDbox<M>:MWRite:BLOCk Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 14 :ODI:PORT<N>:CAPability:DIRection? :ODI:PORT<N>:CAPability:FCONtrols? :ODI:PORT<N>:CAPability:LANes? :ODI:PORT<N>:CAPability:NAME? :ODI:PORT<N>:CAPability:RATes? :ODI:PORT<N>:CAPability:RBMax? :ODI:PORT<N>:CAPability:TBMax? :ODI:PORT<N>:CAPability:TRMatch? :ODI:PORT<N>:NAME? :ODI:PORT<N>:ACTivate :ODI:PORT<N>:DEACtivate :ODI:PORT<N>:CSTatus? :ODI:PORT<N>:PSTatistics:BBURsts? :ODI:PORT<N>:PSTatistics:RBYTes? :ODI:PORT<N>:PSTatistics:TBYTes? :ODI:PORT<N>:PSTatistics:THOFfs? Trigger Commands :TRIGger:OUTPut:MODE :TRIGger:OUTPut:SOURce :TRIGger:LEVel:EXTernal Control In/Out Commands :CIOut:MUX :CIOut:MUX:CLR :CIOut:OUTPut TEST Commands :TEST:PON? :TEST:TST? Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 15 :ETHernet:PORT[1-8]:PSTatistics[:RX]:DROPped? :ETHernet:PORT[1-8]:PSTatistics[:RX]:BYTes? :ETHernet:PORT[1-8]:PSTatistics:TX:BYTes? :ETHernet:PORT[1-8]:PSTatistics:ALL? 7 Examples Introduction PathwaveCapture Cabling of DSP Connectors Setup DSP Usage PathwaveLoopThrough Cabling of DSP Connectors Usage Optional Parameters PathwaveDpu2Dpu Cabling of DSP Connectors Setup DSP Usage Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 16 Contents PathwaveEthernet Cabling of DSP Connectors Setup DSP Usage Continuous Streaming with Deterministic Latency to DSP Module 8 Characteristics Performance Specification Operating Environment General Index Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 17: M8132A Overview

    Front Panel / 20 Related Documents / 21 Additional Documents This chapter provides an overview of M8132A 640 GSa/s Digital Signal Processor module. M8132A Overview The Keysight M8132A is a 640 GSa/s Digital Signal Processor. Key Features The M8132A Digital Signal Processor provides the following key features: •...

  • Page 18: Instrument Options

    NOTE with Vivado™ FPGA design flow from Xilinx is required to successfully implement functionality in the M8132A module. Please contact Keysight prior to purchasing the product to discuss the required configuration as well as support requirements. Instrument Options The M8132A can be ordered as M8132A-002. The -002 indicates that two Xilinx Ultrascale+ VU9P FPGAs are available.
  • Page 19 LED has switched OFF. • During normal operation of the module this LED is ‘OFF’. In case of an error condition such as e.g. a self-test error, the LED is switch ‘ON’. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 20: Related Documents

    In case of invalid signals, it is red. The functionality of this LED is for future use and is currently not supported. Related Documents To access documentation related to the Keysight M8132A Digital Signal Processor, use one of the following methods: •...

  • Page 21: Additional Documents

    • http://www.keysight.com/find/M9506A for 5-slot chassis related documentation. • http://www.keysight.com/find/M9514A for 14-slot chassis related documentation. • http://www.keysight.com/find/M9537A for embedded AXIe controller related documentation. • http://www.keysight.com/products/KF9000B for KF9000B PathWave FPGA related documentation. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 23: Software Installation

    Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide Software Installation The M8132A Digital Signal Processor package is installed along with the M8131A Digitizer package, using the same installer. Therefore, all prerequisites and installation procedure for M8132A module is the same as that for M8131A.

  • Page 25: Soft Front Panel

    Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide Soft Front Panel / 26 Launching the Soft Front Panel / 29 Command Line Arguments / 30 Communication / 32 Soft Front Panel / 38 Clock Tab / 39 IOs Tab...

  • Page 26: Launching The Soft Front Panel

    Launching the Soft Front Panel There are two ways to launch the M8132A Soft Front Panel: Select Start > All Programs > Keysight M8131 > Keysight M8131 Soft Front Panel from the Start menu. From the Keysight Connection Expert select the discovered M8132 module, select the “Installed Software”...
  • Page 27 If no M8132A module is connected to your PC, you can select “Simulation Mode” to simulate an M8132A module. Figure 3 M8132A in simulation mode Next, a software startup screen will be displayed as shown in Figure 4 on page 28. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 28 Soft Front Panel Figure 4 M8132A startup screen Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 29: Command Line Arguments

    Visa PXI resource string of the module to connect to, e.g. PXI12::0::0::INSTR. “auto” selects the next free instrument. /M8132TenGbe Starts up the M8132A with three ODI ports and eight 10 GbE ports instead of the usual four ODI ports. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 30: Communication

    The socket and telnet port are then calculated from the HiSLIP index: • telnet port = 60000 + 2 * <HiSLIP index> • socket port = 60000 + 2 * <HiSLIP index> + 1 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 31 If both /NoAutoID and /AutoID are specified, /AutoID overrides /NoAutoID. The first port not assigned by IANA is 49152 (IANA, Internet Assigned NOTE Numbers Authority, http://www.iana.org Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 32: Soft Front Panel

    The Soft Front Panel includes the following elements: Title Bar Menu Bar Tabs (Clock, IOs and System Monitor) Lower Pane Status Bar The detailed information on these GUI elements are described in the sections that follow. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 33: Title Bar

    Saves configuration as a text file. This feature is not implemented in the current software release. File > Load Configuration… Loads the previously saved configuration file. This feature is not implemented in the current software release. File > Exit Exits the M8132A application. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 34 Switch to the “System Monitor” tab on Parameters window if it is already System open. If not, it adds “System Monitor” tab first. For details, see Monitor Tab on page 51. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 35: Lower Pane

    Opens the Status Window. This feature is currently not implemented. Show Error List Window Opens the window that shows the list of errors and warnings. For details, see Errors List Window on page 36 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 36: Errors List Window

    Click this toggle button to automatically open the errors list window whenever an error occurs (default) or not. Copy Click this button to copy the selected message(s). Select All Click this button to select all messages inside the list. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 37: Status Bar

    Click this field to open the Instrument Selection Dialog. • Instrument status - Displays the instrument status, for example “Reset complete” after issuing a reset command. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 38: Clock Tab

    Clock tab Input Clock Settings • Ref. Clock Source - A clock reference input is provided on the front panel of the M8132A module. The options are: • Internal • External 100MHz Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 39: Ios Tab

    Soft Front Panel IOs Tab The IOs tab provides input and output settings for optical data interfaces. Figure 8 IOs tab Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 40 • Refresh Statistics: Reset the ODI statistics. • Control In/Out - For information on Control In/Out, refer to Control In/Out Commands on page 104. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 41 The test reports the connection status, and in case of failure, the status of each individual lane. All failed test steps are shown. Possible errors are PLL lock failures, burst, overflow, underflow, CRC, and alignment errors. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 42: Ios Tab In 10Gbe Mode

    M8132A displays three ODI ports and eight 10 GbE ports instead of the usual four ODI ports. The ODI4 tab is replaced with 10 GbE, and the Selftest ODI4 button is replaced with Selftest 10 GbE. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 43 Soft Front Panel • On the IOs tab, click 10GbE tab. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 44 Advanced Setting Tooltip: All of the 10 GbE parameters display the same NOTE tooltip (when enabled). The tooltip disappears after 5s. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 45 CAA design. Parameter Value: Hexadecimal formatted 48 bit source MAC address. Reset: A unique locally-administered value created from the instrument serial number and ethernet port number of form 82:09:02:xx:xx:xx Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 46 A value of 0 is expected during error-free normal operation. Bit0: Optical LOS Bit1: !STAT_RX_VALID_CTRL_CODE Bit2: !STAT_RX_BLOCK_LOCK_REG Bit3: Unused Bit4: STAT_RX_HI_BER Bit5: STAT_RX_REMOTE_FAULT Bit6: STAT_RX_LOCAL_FAULT Bit7: STAT_RX_INTERNAL_LOCAL_FAULT Bit8: STAT_RX_RECEIVED_LOCAL_FAULT Bit9: STAT_RX_BAD_PREAMBLE" Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 47 The byte count is reset to 0 when the port is enabled, or the Reset Statistics button is pressed. Rate displays the number of bytes per second received over the previous second. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 48 Ctrl Code. This action affects all eight ports, not only the currently selected port. When button is pressed, a popup appears: If all parts of the test pass, then “Passed” is displayed. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 49 Soft Front Panel If any part of the test fails, then all pass / fail results are shown. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 50: Cabling For 10Gbe Connectivity

    LC Tx/Rx pairs to connect to SFP+ 10GBe optical connections. The link uses OM3 multimode cable and is compatible with 10GBASE-SR physical layer requirements of IEEE 802.3. For information on 10GbE, refer to: IEEE 802.3 standards. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 51: System Monitor Tab

    FPGAs should be configured in a mode that consumes the maximum power. For more information about the queries via SCPI command, refer to Remote Programming on page 61. Figure 9 System Monitor tab Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 53: Control In/Out

    Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide Control In/Out / 54 Control In/Out and Trigger Input This chapter describes the Control In/Out and Trigger Input.

  • Page 54: Control In/Out And Trigger Input

    In/Out (5..9)” can be sourced by GP_TRIG_OUT (0..2) of each FPGA. The following picture shows the switch matrix that allows to configure the connections between the front panel and the sandbox ports: Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 55: Input Multiplexer Of The Switch Matrix

    Table 4 Bit Positions for Output Ports of the Input Multiplexer of the Switch Matrix Bit Positions Output Port 23..20 GP_TRIG_IN_B(2) 19..16 GP_TRIG_IN_B(1) 15..12 GP_TRIG_IN_B(0) 11..8 GP_TRIG_IN_A(2) 7..4 GP_TRIG_IN_A(1) 3..0 GP_TRIG_IN_A(0) Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 56: Output Multiplexer Of The Switch Matrix

    Bit Positions for Output Ports of the Output Multiplexer of the Switch Matrix Bit Positions Output Port 20..18 LOOP_BACK (1) 17..15 LOOP_BACK (0) 14..12 Control Out (9) 11..9 Control Out (8) 8..6 Control Out (7) 5..3 Control Out (6) 2..0 Control Out (5) Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 57: Trigger Input

    The trigger threshold can be set via remote programming interface (SCPI). For more details on trigger specification, refer to the datasheet of the instrument. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 59: Using Kf 9000B Pathwave Fpga With The M8132A

    Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide Using KF 9000B PathWave FPGA with the M8132A PathWave FPGA KF9000B must be used as the design tool to program the sand boxes of the Xilinx FPGA inside the M8132A. Additional documentation can be found at: •...

  • Page 61: Remote Programming

    Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide Remote Programming / 62 Remote Programming Overview / 64 Status Commands / 70 Latency Calibration Commands / 72 Common Commands / 75 System Commands / 80 Time Base Commands / 81...

  • Page 62: Remote Programming Overview

    If the instruction does not require any program data parameters, you do not need to include any white space. In this manual, white space is defined as one or more spaces. ASCII defines a space to be character 32 in decimal. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 63: Braces

    When there is more than one data parameter, they are separated by commas (,). You can add spaces around the commas to improve readability. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 64: Status Commands

    You can set transition filter bits to detect positive transitions (PTR), negative transitions (NTR) or both. Transition filters are read/write registers. They are not affected by *CLS. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 65 Standard Event Status Register Status Byte Operation Complete Query Error Device Dependent Error Execution Error Command Error Power On Summary of IEEE 488.2 Status Structure Registers Figure 10 Status register structure Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 66: Status:preset

    One or more bits are set in the Standard Event Register Master Summary One or more bits are set in the Status Byte Register Operational Data One or more bits set in the Operation Data Register (bits must be enabled) Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 67: Questionable Data Register Command Subsystem

    Returns “0” Not used 1024 Returns “0” Not used 2048 Returns “0” Not used 4096 Returns “0” Not used 8192 Returns “0” Not used 16384 Returns “0” Not used 32768 Returns “0” Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 68: Reference Clock Status Subsystem

    Connection Status Subsystem The Connection Status register contains the state of the USB connection to the M8132A module. The following SCPI commands and queries are supported: :STATus:QUEStionable:CONNection[:EVENt]? :STATus:QUEStionable:CONNection:CONDition? :STATus:QUEStionable:CONNection:ENABle[?] :STATus:QUEStionable:CONNection:NTRansition[?] :STATus:QUEStionable:CONNection:PTRansition[?] Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 69 Remote Programming Table 11 Connection status register Bit Number Decimal Value Definition USB disconnected USB module connection state Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 70: Latency Calibration Commands

    COMBined - Phase alignment to the primary module’s core clock and latency calibration is done in the same step. This mode is used for the latency setup between M8131A and M8121A AWG. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 71: Calibrate:latency[:Step]

    B Selects FPGA B. <sync_pulse_delay> The synchronization pulse delay as an unsigned integer between 0 and 1023. Query :CALibrate:LATency:SPDelay? {A|B} Description This query returns the synchronization pulse delay for the selected FPGA. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 72: Common Commands

    *OPC Set the “Operation Complete” bit (bit 0) in the Standard Event register after the previous commands have been completed. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 73: Opc

    Poll but the “Master Summary” bit (bit 6) is not cleared by the *STB? command. *TST? Execute Self Tests. If self-tests pass, a 0 is returned. A number lager than 0 indicates the number of failed tests. To get actual messages, use :TEST:TST? Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 74: Lrn

    Use :SYST:SET to send the learn string. See :SYSTem:SET[?] on page 76. *WAI? Prevents the instrument from executing any further commands until the current command has finished executing. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 75: System Commands

    The response is a <DEFINITE LENGTH ARBITRARY BLOCK RESPONSE DATA> element. The full path for every command and query is returned separated by linefeeds. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 76: System:license:extended:list

    In set form, the block data must be a complete instrument set-up read using the query form of the command. This command has the same functionality as the *LRN command. Parameters <binary block data> Example Command :SYST:SET <binary block data> Query :SYST:SET? Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 77: System:version

    If a connection is not available, the returned value is -1. This is only useful if there is more than one Keysight module connected to a PC, otherwise one would normally use the default connections (HiSLIP and VXI-11 instrument number 0, socket port 5025, telnet port 5024) One can never be sure if a socket port is already in use, so one could e.g.

  • Page 78: System:communicate:hislip[:Number]

    Description The query returns the port number of the control connection. You can use the control port to send control commands (for example “Device Clear”) to the instrument. Example Query :SYST:COMM:TCP:CONT? Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 79: System:error:count

    :SYST:LIC:LIST? -> "M8070A-CAL" :SYSTem:LICense:SUBScription:DATE? Query :SYSTem:LICense:SUBScription:DATE? <“FeatureName”> Parameters <“FeatureName”> - License's feature name Description This query returns the subscription date of the licenses installed in YYYYMMDD format. Examples Query :SYST:LIC:SUBS:DATE? “M8070A-CAL” Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 80: Time Base Commands

    Query :TIMebase:REFClock? The query returns the currently selected reference clock source. Returned Format [:TIMebase:REFClock] {INTernal | E100}<NL> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 81: Instrument Commands

    The command stops the flashing of the green “Access” LED before the flashing interval has elapsed. :INSTrument:HWRevision? Query :INSTrument:HWRevision? Description The query returns the instrument’s hardware revision number. Returned Format [:INSTrument:HWRevision] {hw_revision}<NL> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 82: Fpga Access Commands

    <file_name> File name of the FPGA update image :INSTrument:FPGA:RESet Command :INSTrument:FPGA:RESet {A|B} Description The command loads the default image into the FPGA. A Selects FPGA A for update. B Selects FPGA B for update. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 83: Instrument:fpga:direct:dword[?]

    <value list> a comma separated value list to be written at the address in the FPGA. Query :INSTrument:FPGA:DIRect:BLOCk? {A|B}, <address>, <number of values> The query reads a list of values at an arbitrary address in the FPGA. Returned Format [:INSTrument:FPGA:DIRect:BLOCk] <value list><NL> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 84: Instrument:fpga:gearbox:clear

    A Selects FPGA A. B Selects FPGA B. <channel-mask> The mask selects one or both of the FPGA-internal channels. Bit 0 is used for channel 1, bit 1 for channel 2. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 85: Current And Power Monitor Commands

    :INSTrument:MONitor:CURRent:MGTAVTT? {A|B} Description The query returns the current measured at MGTAVTT in the selected FPGA. A Selects FPGA A. B Selects FPGA B. Returned Format :INSTrument:MONitor:CURRent:MGTAVTT <value> Example :INST:MON:CURR:MGTAVTT? -> 2.0E+00 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 86: Instrument:monitor:current:vccint

    :INSTrument:MONitor:POWer:MGTAVCC? {A|B} Description The query returns the power measured at MGTAVCC in the selected FPGA. A Selects FPGA A. B Selects FPGA B. Returned Format :INSTrument:MONitor:POWer:MGTAVCC <value> Example :INST:MON:POW:MGTAVCC? -> 2.5E+01 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 87: Instrument:monitor:power:mgtavtt

    :INSTrument:MONitor:POWer:VCCINT? {A|B} Description The query returns the power measured at VCCINT in the selected FPGA. A Selects FPGA A. B Selects FPGA B. Returned Format :INSTrument:MONitor:POWer:VCCINT <value> Example :INST:MON:POW:VCCINT? -> 3.0E+01 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 88: Sandbox Commands

    Description The query returns the version of the FPGA hosting the sandbox. <M> An integer, 1 for FPGA A, 2 for FPGA B Returned Format [:INSTrument:SANDbox<M>:FVERsion] <name> Example :INSTrument:SANDbox1:FVERsion? -> 3 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 89: Instrument:sandbox:Kid

    The command loads a *.k7z file and configures the sandbox. <M> An integer, 1 for FPGA A, 2 for FPGA B <path> The path to the *.k7z file Example INSTrument:SANDbox1:CONFigure “C:\Program Files (x86)\Keysight\M8131\Examples\ M8132A_example_partial_k7z\ m8132a_fpga_a_sandbox_a_example_design_4_0.k7z” Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 90: Instrument:sandbox:Rlist

    The query returns the register value read. <M> An integer, 1 for FPGA A, 2 for FPGA B <address_or_name> The address or name of the register Returned Format [:INSTrument:SANDbox<M>:PEEK < address_or_name >] <value> Example :INSTrument:SANDbox1:PEEK? “Register_Bank_scratch” -> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 91: Instrument:sandbox:Poke

    Not yet supported. <M> An integer, 1 for FPGA A, 2 for FPGA B <index> The stream index. <size> The read size in bytes. Returned Format [:INSTrument:SANDbox<M>:SREad:BLOCk < index>,<size>] <csv_block> Example :INSTrument:SANDbox1:SREad:BLOCk? -> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 92: Instrument:sandbox:Swrite

    Query :INSTrument:SANDbox<M>:MLISt? Description The query returns the list of all memory names. <M> An integer, 1 for FPGA A, 2 for FPGA B Returned format [:INSTrument:SANDbox<M>:MLISt] <memory_map_list> Example :INSTrument:SANDbox1:MLISt? -> "" Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 93: Instrument:sandbox:Minfo

    <M> An integer, 1 for FPGA A, 2 for FPGA B <address_or_name> The address or name of the memory <size> The read size in 4-byte words Returned format [:INSTrument:SANDbox<M>:MREad:BLOCk <address_or_name>,<size>] <csv_block> Example :INSTrument:SANDbox1:MREad:BLOCk? -> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 94: Instrument:sandbox:Mwrite

    Not yet supported. <M> An integer, 1 for FPGA A, 2 for FPGA B <address_or_name> The address or name of the memory <csv_block> The data block in CSV format Example :INSTrument:SANDbox1:MWRite:BLOCk Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 95: Optical Data Interface Commands

    <N> An integer to select the ODI port, 1-4. Return Format [:ODI:ACHannels] {active_channels_string}<NL> :ODI:PORT:COUNt? Query :ODI:PORT:COUNt? Description The query returns the total number of ODI channels. Return Format [:ODI:PORT:COUNt] <ports><NL> Example :ODI:PORT:COUNt? -> 4 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 96: Odi:port:Capability:direction

    <M> An integer, 0 - 13 Example :ODI:PORT1:CAP:FCON? -> “NONE, IBANd” :ODI:PORT<N>:CAPability:LANes? Query :ODI:PORT<N>:CAPability:LANes? Parameters None Description The query returns the number of lanes supported by this port. Return Format [:ODI:PORT<N>:CAPability:LANes] <lanes><NL> Example :ODI:PORT1:CAP:LAN? -> 12 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 97: Odi:port:Capability:name

    The query returns the supported receiver maximum burst values. Return Format [:ODI:PORT<N>:CAPability:RBMax] <burst-max-list><NL> <burst-max-list>: [256 | 2048] [,…] Example :ODI:PORT:CAP:RBM? -> 2048 :ODI:PORT<N>:CAPability:TBMax? Query :ODI:PORT<N>:CAPability:TBMax? Parameters None Description The query returns the supported transmitter maximum burst values. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 98: Odi:port:Capability:trmatch

    The command switches on the optical port using the specified parameters. <N> An integer to select the ODI port, 1-4. <lane_rate> Lane rate R141 14.1 Gbit/s. <tx_burst_max> Maximum transmit burst size in bytes. Possible values are 256 and 2048 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 99: Odi:port:Deactivate

    The query returns the communication status of an optical port. <N> An integer to select the ODI port, 1-4. Returned Format [:ODI:PORT<N>:CSTatus] <status><NL> <status> 32-bit integer, meaning of the status bits is described in Table 12 on page -100. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 100 54 of the Interlaken idle/control word, bit 18 is channel 1 from bit 53 of the control word, and so RxFcStatus14 Status bits described with “since last GetStatus” are cleared by :ODI:PORT<N>:CSTatus? query. All status bits will be 0 on an inactive port. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 101: Odi:port:Pstatistics:bbursts

    This query returns the number of bytes transmitted by the ODI port. Example :ODI:PORT1:PST:TBYT? -> <integer> :ODI:PORT<N>:PSTatistics:THOFfs? Query :ODI:PORT<N>:PSTatistics:THOFfs? Parameters None Description This query returns the transmission holdoffs. Example :ODI:PORT1:PST:THOF? -> <integer> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 102: Trigger Commands

    FPGA Bit Files which are loaded at the Soft Front Panel Start-up. Query :TRIGger:OUTPut:MODE? {A|B} The query returns the current trigger output mode. Returned Format [:TRIGger:OUTPut:MODE {A|B}] { LOW|HIGH |TOGGle|FSM|BYPass }<NL> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 103: Trigger:output:source

    The command specifies the trigger level when the external trigger input is used as trigger source. <level> The trigger level in volts as a floating-point number. Query :TRIGger:LEVel:EXTernal? The query returns the current trigger level. Returned Format [:TRIGger:LEVel:EXTernal] <level><NL> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 104: Control In/Out Commands

    Bit Positions for output ports of the Output Multiplexer Bit Positions Output Port 20..18 LOOP_BACK (1) 17..15 LOOP_BACK (0) 14..12 Control Out (9) 11..9 Control Out (8) 8..6 Control Out (7) 5..3 Control Out (6) 2..0 Control Out (5) Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 105 Reserved, do not use 1000 LOOP_BACK (0) 1001 LOOP_BACK (1) Table 16 Mapping between input and output ports of the Output Multiplexer Value (binary) Port GP_TRIG_OUT_A(0) GP_TRIG_OUT_A(1) GP_TRIG_OUT_A(2) GP_TRIG_OUT_B(0) GP_TRIG_OUT_B(1) GP_TRIG_OUT_B(2) Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 106: Ciout:mux:clr

    Description The command enables/disables the control outputs: ON | 1: Enables control outputs. OFF | 0 (default): Disables control outputs. Query :CIOut:OUTPut? Description The query returns the status of control outputs. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 107: Test Commands

    This query returns the result of the power on self-tests. Example Query :TEST:PON? :TEST:TST? Query :TEST:TST? Parameters None Description This query is similar to *TST? but the actual test messages are returned. Example Query :TEST:TST? Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 108: Ethernet Commands

    When disabled, the source MAC address field is transmitted unchanged from the CAA design. When enabled, the source MAC address field in each transmitted packet will use the value from ETHernet:PORT[1-8]:FRAMe:MACSource:VALue Default value Example :ETH:PORT[1]:FRAM:MACS OFF Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 109: Ethernet:port[1-8]:Frame:macsource:value

    When disabled, the destination MAC address field is transmitted unchanged from the CAA design. When enabled, the destination MAC address field in each transmitted packet will use the value from ETHernet:PORT[1-8]:FRAMe:MACDest:VALue Default value Example :ETH:PORT[2]:FRAM:MACD ON :ETH:PORT[2]:FRAM:MACD? -> 1 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 110: Ethernet:port[1-8]:Frame:macdest:value [?]

    When disabled, the Ethernet Type field is transmitted unchanged from the CAA design. When enabled, the Ethernet Type field in each transmitted packet will use the value from ETHernet:PORT[1-8]:FRAMe:ETHertype:VALue Default Value Example Command :ETH:PORT[1]:FRAM:ETH ON Query :ETH:PORT[1]:FRAM:ETH? -> 1 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 111: Ethernet:port[1-8]:Frame:ethertype:value

    All bits are reset when the port is enabled. A value of 0 is expected during error-free normal operation. Bit0: Optical LOS Bit1: !STAT_RX_VALID_CTRL_CODE Bit2: !STAT_RX_BLOCK_LOCK_REG Bit3: Unused Bit4: STAT_RX_HI_BER Bit5: STAT_RX_REMOTE_FAULT Bit6: STAT_RX_LOCAL_FAULT Bit7: STAT_RX_INTERNAL_LOCAL_FAULT Bit8: STAT_RX_RECEIVED_LOCAL_FAULT Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 112: Ethernet:port[1-8]:Pstatistics[:Rx]:Good

    This query returns the number of received dropped packets. The packet-count is reset to 0 when the port is enabled. (Dropped packets are calculated as the sum of undersize, oversize and packets with bad FCS) Example :ETH:PORT[1]:PST:DROP? Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 113: Ethernet:port[1-8]:Pstatistics[:Rx]:Bytes

    "TxBytes, RxBytes, RxGood, RxBad, RxDropped, timestamp." The timestamp is in units of seconds All counts and timestamps are set to 0 when the port is enabled. Example :ETH:PORT[1]:PST:ALL? -> "0,0,0,0,0,743.759755296" Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 115 Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide Examples / 116 Introduction / 117 PathwaveCapture / 118 PathwaveLoopThrough / 120 PathwaveDpu2Dpu / 121 PathwaveEthernet / 122 Continuous Streaming with Deterministic Latency to DSP Module...

  • Page 116: Examples

    PathwaveCaptureExample example is written in C# and uses the VISA.NET library to control the instrument over SCPI. The PathwaveLoopThrough example is written in C++ and uses the M8131PublicAPI library to control the Pathwave functionality. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 117: Pathwavecapture

    HSLIP address provided for the instrument. The data encoded in RegisterDefinitions.cs file will be replaced by NOTE register meta-data from the k7z file in a release shortly. Usage PathwaveCaptureExample <dsp hslip addr> <imageFpgaA.k7z> <imageFpgaB.k7z> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 118: Pathwaveloopthrough

    Transceiver Ports is a comma-separated list of the ports used to transmit and receive, for example “1,3” for the loop-through case. The corresponding multiplexors (for this example 2 and 4) are configured automatically. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 119: Optional Parameters

    New packet size created by loopback/passthrough path, in units of 64 bytes • useFifoDepthSync=0 Value to set to use_fifo_depth_sync bit in DPU_MUX_CONTROL • useSync=0 Value to set to use_sync bit in DPU_MUX_CONTROL Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 120: Pathwavedpu2Dpu

    The test configures and runs a 2-minute test exercising DPU to DPU links between the two FPGA Customer Accessible Areas and should report 'no problems' for each of the 4 test entities. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 121: Pathwaveethernet

    Before starting the example program, start the M8132A Soft Front Panel in 10 GbE mode with the /M8132TenGbe command line switch and note the HSLIP address provided for the instrument. Usage PathwaveEthernet <dsp hslip addr> <imageFpgaA.k7z> Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 122: Continuous Streaming With Deterministic Latency To Dsp Module

    Examples Continuous Streaming with Deterministic Latency to DSP Module Refer to Keysight M8131A 16/32 GSa/s Digitizer User’s Guide. The User’s Guide of the M8131A includes a description of this example. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...

  • Page 123: Characteristics

    Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide Characteristics / 123 Performance Specification / 123 Operating Environment / 124 General Performance Specification The performance specification can be found in the Data Sheet of the M8132A at: http://www.keysight.com/find/M8132A. Operating Environment Storage Temperature −40 °C to +70 °C...
  • Page 124 When operating the M8132A choose a location that provides at least 80 mm of clearance at rear, and at Requirements least 30 mm of clearance at each side for the AXIe chassis. Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide...
  • Page 125 Root Level Commands, File menu, Safety Summary, Help menu, Status bar, Status Commands, System Commands, System Monitor Tab, Instrument Commands, IOs Tab, TEST Commands, Time Base Commands, Key Features, Title bar, Tools menu, Keysight M8132A Digital Signal Processor User’s Guide...
  • Page 126 This information is subject to change without notice. © Keysight Technologies 2024 Edition 3.0, May 2024 www.keysight.com...

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