BL54L15 Development Kit User Guide Revision History Version Date Notes Contributor(s) Approver 29 Aug 2024 Initial version Raj Khatri Jonathan Kaye 30 Oct 2024 Some minor corrections throughout and removed Raj Khatri Jonathan Kaye reference to Medium Voltage mode. 12 Dec 2024...
Four-wire UART Serial Interfaces ....................................10 6.4.1 UART0 Interface (on BL54L15) Driven by USB (J3) connector (USB to UART0 debugger chip U2) ............. 11 6.4.2 UART1 Interface (on BL54L15) Driven by USB (J3) connector (USB to UART1 debugger chip U2) ............... 11 Software for Communicating to BL54L15 UART0 and UART1 ...............................
Bluetooth LE, 802.15.4 (Thread & Matter) and Near Field Communication (NFC) applications. The development kit is designed to enable customers to test and validate all the hardware interfaces of the BL54L15 module and support the rapid development of application software using either Zephyr RTOS or Nordic Semiconductor nRFConnect SDK.
The board allows the BL54L15 series module to physically connect to a PC via the supplied USB cable for development purposes. The development board provides USB1-to-Virtual COM port (UART0, UART1 on BL54L15) conversion through a Nordic nRF5340 debugger chip (U2).
Development board 453-00001-K1 (fitted with 453-00001 Module, BL54L15, (Nordic nRF54L15), Trace antenna) BL54L15 Default Configuration and Jumper Settings Important! To ensure correct out-of-the-box configuration, the BL54L15 development board switch and jumpers must be configured as shown in Figure Figure 1: Correct BL54L15 development board 453-00001-K1 or 453-00044-K1 jumper and switch settings (image for 453-00001-K1) https://www.ezurio.com/...
VDD_nRF pin can also be powered from external power supply by using P6 header. However, in order to synchronize IO voltage between • nRF5340 debug chip (U2) and BL54L15, please depopulate R16 and fit R35 as 0 ohm. Figure 3 shows the PCB location of these two rework parts.
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VDD_DBGR – is just renamed VDDIO, used to power the debugger circuitry (U2). • VDD_nRF – Supplies the BL54L15 series module only. Current measuring block on the development board only measures the current into • power domain VDD_nRF (that is current going into header P6 pin3-2).
For those customers that require access to BL54L15 SWD (JTAG) interface, the BL54L15 development board (see Understanding the Development Board) has on-board circuitry to allow access to BL54L15 module SWD interface (via USB connector J3). The USB to SWD debugger circuitry is formed by Nordic nRF5340 (U2) debugger MCU).
Note: The BL54L15 module can provide multiple four-wire UART interfaces on the HW and the other four signals (DTR, DSR, DCD, RI), which are low bandwidth signals, can be implemented in FW (if required using any spare digital GPIO pins.
User Guide 6.4.1 UART0 Interface (on BL54L15) Driven by USB (J3) connector (USB to UART0 debugger chip U2) USB Connector: The development kit provides a USB Type C connector (J3) which allows connection to any USB host device. The connector •...
Software for Communicating to BL54L15 UART0 and UART1 The development board connects the BL54L15 module to a virtual COM port (UART0 or UART1) of a PC or other device. From a PC, you can communicate with the module using a terminal emulator like PuTTY https://www.chiark.greenend.org.uk/~sgtatham/putty/...
User Guide GPIO Breakout Connectors Access to all 31 x BL54L15 series module signal pins (GPIO = General Purpose Input /Output) is available on 2.54mm pitch header connectors on J1, J2, J5, J37, J18, J16 (2.54mm header connector). These breakout connectors can interface to a wide array of sensors via customer developed FW, and the DVK incorporates additional fly-lead cables inside the box to enable simple, hassle-free testing of these multiple interfaces.
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Accessed on J5 via open solder brides SB5, SB6. By default, the optional external 32.768 kHz crystal circuit is connected to BL54L15 via closed solder bridge SB3 and SB4. To use P1.00, P1.01 as GPIO on J5 header, then cut SB3, SB4 and solder connect SB5, SB6.
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SB15 P2.03 SB16 which are directly connected to QSPI chip U9. To disconnect P2.00 QSPI chip U9 from BL54L15, cut solder bridges SB11, SB12, SB13, SB14, SB15, SB16. BL54L15 pin header J37 for access: SWD and Trace • P2.06 (via R68) and TraceCLK nRF54L15_RESET •...
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BL54L15 Development Kit User Guide Header Connector BL54L15 Module Signals Exposed P15 header brings access BL54L15 module SWD interface. Debug IN Connector SWDIO • Place on top of Trace connector SWDCLK • VDDIO • SWDIO • nRESET SWDCLK SWD_nRF54 SELECT...
User Guide 7.2 Additional Peripherals/Sensors The BL54L15 development board provides for simple and hassle-free connectivity to a wide range of sensors but also includes several on-board sensors and options to enable a developer to test functionality straight out of the box.
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BL54L15 Development Kit User Guide Table 6: MikroE connector J34 signal via level shifter chip (U11, U14, U12) on DVK-BL54L15 to BL54L15 module signal mappings MikroE MikroE signal via level shifter BL54L15 module (MOD1) pin Comments connector, pin signal J34pin1 MikroE_PWM P1.14 (default connection)
User Guide 7.2.2 4 Buttons and 4 LEDs connected to BL54L15 Four Buttons, four LEDs are connected to the BL54L15 pins via pin headers. Table 8 lists signal mappings Table 8: LEDs and Buttons on BL54L15 devboard to BL54L15 module signal mappings...
NFC External Antenna Connector and NFC Antenna RF Matching Circuit The NFC antenna input connector (J7) allows the Ezurio-supplied flex-PCB NFC antenna to be plugged in. The BL54L15 module NFC circuit uses two pins, pin 15 (P1.02/NFC1) and pin 14 (P1.03/NFC2) to connect the antenna. These pins are shared with GPIOs (P1.02 and P1.03). Pin 15 (P1.02/NFC1) and pin 14 (P1.03/NFC2) are configured by default on the development board schematic to use NFC antenna, but if Pin 15...
There is an optional external serial QSPI Nor flash IC (U9) that may be used, for example, for data logging purposes. U9 can also be capable of SPI mode. Closed solder bridges SB11, SB12, SB13, SB14, SB15 and SB16 by default connects this optional external serial (QSPI) flash (U9 to the BL54L15 module(mod1).
±250 ppm. The BL54L15 also allows, as an option, to connect an external higher accuracy (±20 ppm) 32.768 kHz crystal to the BL54L15 pins P1.00/XL1 (pin 25) and P1.01/XL2 (pin 24). This provides improved protocol timing and helps with radio power consumption in the system on idle /system off sleep modes by reducing the time that the Rx window must be open.
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BL54L15 Development Kit User Guide Figure 10: Optional external 32.768kHz crystal (X1) circuit schematic and PCB The X1 crystal is 9pF load capacitor part. The nRF54L15 has internal load capacitor, so to complete the oscillator the load capacitor inside the nRF54L15 should be set to 9pF (in Firmware) to use X1.
If the 10 Ohm resistor is chosen, 10 mV equals 1mA. This method allows the dynamic current consumption waveforms to be shown on an oscilloscope as the BL54L15 radio operates. This can provide insight into power optimization.
Ezurio materials or products for any specific or general uses. Ezurio or any of its affiliates or agents shall not be liable for incidental or consequential damages of any kind. All Ezurio products are sold pursuant...
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