Dram Timing Configuration; Memory Configuration - Biostar GF8100M2TE Manual

GF8100 M 2+ TE BIOS Manual

DRAM Timing Configuration

DRAM Timing Co nfiguration
Memory CLK
CAS Latency( Tcl)
RAS/CAS Dela y(Trcd)
Row Precharg e Time(Trp)
Min Active R AS(Tras)
RAS/RAS Dela y(Trrd)
Row Cycle (T rc)
Command Rate (CR)
> Memory Confi guration
DRAM Timing Mo de
CAS Latency( CL)
2T Command
TRCD
TRP
tRTP
vxx .xx (C)Copyright 1985-200x, American Me gatrends, Inc.

Memory Configuration

Memory Configu ration
Bank Interleav ing
Enable Clock t o All DIMMs
MemClk Tristat e C3/ATLVID
Memory Hole Re mapping
Power Down Ena ble
Power Down M ode
vxx .xx (C)Copyright 1985-200x, American Me gatrends, Inc.
Bank Interleaving
Bank Interleaving is an advanced chipset technique used to improve memory
perform ance. Memory interleaving increases bandwidth by allowing simultaneous
access to more than one piece of memory.
Options: Auto (Default) / Disabled
BIOS SETU P U TILITY
Performance
[Aut o]
[Aut o]
[Aut o]
[Aut o]
[Aut o]
[Aut o]
BIOS SETU P U TILITY
Performance
[Aut o]
[Dis abled]
[Dis abled]
[Ena bled]
[Dis abled]
[Cha nnel]
28
S elect Screen
S elect Item
Enter G o to Sub Screen
F1 G eneral Help
F10 S ave and Exit
ESC E xit
Enable Bank Memory
Interleaving
S elect Screen
S elect Item
+- C hange Option
F1 G eneral Help
F10 S ave and Exit
ESC E xit