Ricoh R2051 Series Manual
Ricoh R2051 Series Manual

Ricoh R2051 Series Manual

2 wire interface real-time clock ics with battery backup switch-over function

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2 wire interface Real-Time Clock ICs with Battery Backup switch-over Function
OUTLINE
The R2051 is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and
configured to perform serial transmission of time and calendar data to the CPU. Further, battery backup switchover
circuit and a voltage detector are incorporated. The periodic interrupt circuit is configured to generate interrupt
signals with six selectable interrupts ranging from 0.5 seconds to 1 month. The 2 alarm interrupt circuits generate
interrupt signals at preset times. As the oscillation circuit is driven under constant voltage, fluctuation of the
oscillator frequency due to supply voltage is small, and the time keeping current is small (TYP. 0.4µA at 3V). The
oscillation halt sensing circuit can be used to judge the validity of internal data in such events as power-on; The
supply voltage monitoring circuit is configured to record a drop in supply voltage below two selectable supply
voltage monitoring threshold settings. The 32.768kHz clock output function (CMOS output) is intended to output
sub-clock pulses for the external microcomputer. The oscillation adjustment circuit is intended to adjust time counts
with high precision by correcting deviations in the oscillation frequency of the quartz crystal unit. Battery backup
switchover function is the automatic switchover circuit between a main power supply and a backup battery of
primary or secondary battery. Switchover is executed by monitoring the voltage of a main power supply, therefore
the voltage of a backup battery voltage is not relevant. Since the package for these ICs is SSOP16 (5.0x6.4x1.25:
R2051Sxx), FFP12 (2.0x2.0x1.0: R2051Kxx), or TSSOP10G (4.0x2.9x1.0: R2051Txx), high density mounting of
ICs on boards is possible.
FEATURES
Minimum Timekeeping supply voltage Typ. 0.75V (Max. 1.00V); VDD pin
Low power consumption 0.4µA TYP (1.0µA MAX.) at V
Built-in Backup switchover circuit (can be used for a primary battery, a secondary battery, or an electric double
layer capacitor)
Only two signal lines (SCL and SDA) required for connection to the CPU. ( I
Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days,
and weeks) (in BCD format)
Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month)
to the CPU and provided with an interrupt flag and an interrupt halt (except R2051Txx)
2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and
minute alarm settings) (except R2051Txx)
Built-in voltage detector with delay
With Power-on flag to prove that the power supply starts from 0V
32-kHz clock output pin (CMOS output. "H" level is always equal to VCC.)
Supply voltage monitoring circuit with two supply voltage monitoring threshold settings
Automatic identification of leap years up to the year 2099
Selectable 12-hour and 24-hour mode settings
High precision oscillation adjustment circuit
Built-in oscillation stabilization capacitors (CG and CD)
CMOS process
Package SSOP16 (5.0mm x 6.4mm x 1.25mm : R2051Sxx), FFP12 (2.0mm x 2.0mm x 1.0mm : R2051Kxx)
TSSOP10G (4.0x2.9x1.0: R2051Txx)
R2051 SERIES
=3V
DD
2
C-Bus Interface, 400kHz)
NO.EA-104-070626
1

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  • Page 1 R2051 SERIES 2 wire interface Real-Time Clock ICs with Battery Backup switch-over Function NO.EA-104-070626 OUTLINE The R2051 is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and configured to perform serial transmission of time and calendar data to the CPU. Further, battery backup switchover circuit and a voltage detector are incorporated.
  • Page 2: Pin Configuration

    R2051 Series PIN CONFIGURATION R2051Txx(TSSOP10G) R2051Sxx(SSOP16) R2051Kxx(FFP12) CLKOUT CLKOUT OSCIN OSCIN OSCOUT OSCOUT VDCC VDCC INTR TOP VIEW TOP VIEW TOP VIEW BLOCK DIAGRAM CPU POWER SUPLLY BATTERY VOLTAGE VOLTAGE DETECTOR MONITOR VDCC DELAY (NC) OSCIN REAL TIME CLOCK OSCOUT...
  • Page 3: Selection Guide

    R2051 Series SELECTION GUIDE In the R2051xxx Series, output voltage and options can be designated. Part Number is designated as follows: R2051K01-E2 ←Part Number ↑ ↑ ↑ R2051abb-cc Code Description Designation of the package. K: FFP12 S: SSOP16 T: TSSOP10G Serial number of Voltage detector setting etc.
  • Page 4: Pin Description

    R2051 Series PIN DESCRIPTION Symbol Item Description R2051Kxx R2051Sxx R2051Txx (FFP12) (SSOP16) (TSSOP10G) Serial The SCL pin is used to input clock pulses Clock Line synchronizing the input and output of data to and from the SDA pin. Allows a maximum input voltage of 5.5 volts...
  • Page 5: Absolute Maximum Ratings

    DET1 *2) CGout is connected between OSCIN and VSS, CDout is connected between OSCOUT and VSS. R2051 series incorporates the capacitors between OSCIN and VSS, between OSCOUT and VSS. Then normally, CGout and CDout are not necessary. *3) Quartz crystal unit: CL=6-8pF, R1=30KΩ...
  • Page 6: Dc Electrical Characteristics

    R2051 Series DC ELECTRICAL CHARACTERISTICS • R2051K01, R2051S01, R2051T01 (Unless otherwise specified: V =0V,V =3.0V, 0.1uF between VDD and VSS, CIN and VSS, Topt=-40 to +85°C) Symbol Item Pin Name Conditions Min. Typ. Max. Unit “H” Input Voltage SCL,SDA 0.8x “L”...
  • Page 7 R2051 Series • R2051K02, R2051S02 (Unless otherwise specified: V =0V,V =3.3V, V =3.0V, 0.1uF between VDD and VSS, CIN and VSS, Topt=-40 to +85°C) Symbol Item Pin Name Conditions Min. Typ. Max. Unit “H” Input Voltage SCL,SDA 0.8x “L” Input Voltage -0.3...
  • Page 8 R2051 Series • R2051S03 (Unless otherwise specified: V =0V, V =5.0V, V =3.0V, 0.1uF between VDD and VSS, CIN and VSS, Topt=-40 to +85°C) Symbol Item Pin Name Conditions Min. Typ. Max. Unit “H” Input Voltage SCL,SDA 0.8x “L” Input Voltage -0.3...
  • Page 9: Ac Electrical Characteristics

    R2051 Series AC ELECTRICAL CHARACTERISTICS Unless otherwise specified: V =0V,Topt=-40 to +85°C Input and Output Conditions: V =0.8×V =0.2×V =0.8×V =0.2×V ,CL=50pF ≥1.7V *1) ≥2.5V *1) Item Condi- Unit -bol Tions Min. Typ. Max. Min. Typ. Max. SCL Clock Frequency µs...
  • Page 10 R2051 Series HIGH HD;STA SDA(IN) HD;STA SU;DAT HD;DAT SU;STA SU;STO SDA(OUT) PL;DAT PZ;DAT Start Condition Stop Condition Repeated Start Condition DET1 DELAY VDCC...
  • Page 11: Package Dimensions

    R2051 Series PACKAGE DIMENSIONS • R2051Kxx 1PIN INDEX 0.05 0.35 2PIN INDEX 0.25 1.0Max 0.35 0.2±0.15 (BOTTOM VIEW) 0.17±0.1 0.27±0.15 2.0±0.1 unit: mm...
  • Page 12 R2051 Series • R2051Sxx 0 to 10° 5.0±0.3 +0.1 0.15 -0.05 0.65 0.225typ 0.10 +0.1 0.22 -0.05 0.15 unit: mm...
  • Page 13 R2051 Series • R2051Txx 0 to 10° 2.9±0.2 +0.1 0.13 -0.05 0.2±0.1 0.15 unit: mm...
  • Page 14: General Description

    R2051 Series GENERAL DESCRIPTION • Battery Backup Switchover Function The R2051 has two power supply input, or VCC and VSB. With monitoring input voltage of VCC pin by internal Voltage Detector, it is selected which power supply of VCC or VSB is used for the internal power source.
  • Page 15 R2051 Series • Alarm Function The R2051 incorporates the alarm interrupt circuit configured to generate interrupt signals to the CPU at preset times. The alarm interrupt circuit allows two types of alarm settings specified by the Alarm_W registers and the Alarm_D registers.
  • Page 16 R2051 Series form adapted to interruption from the CPU in the level mode (with second, minute, hour, and month interrupts). The condition of periodic interrupt signals can be monitored with using a polling function. R2051Txx has the periodic interrupt registers, but does not have INTR output pin.
  • Page 17: Address Mapping

    R2051 Series Address Mapping Address Register Name D a t a A3A2A1A0 0 0 0 0 Second Counter 0 0 0 1 Minute Counter 0 0 1 0 Hour Counter P/ A 0 0 1 1 Day-of-week Counter 0 1 0 0...
  • Page 18: Register Settings

    R2051 Series Register Settings • Control Register 1 (Address Eh) WALE DALE SCRA TEST (For Writing) 12 /24 TCH2 WALE DALE SCRA TEST (For Reading) 12 /24 TCH2 Default Settings *) *) Default settings: Default value means read / written values when the PON bit is set to “1” due to VDD power-on from 0 volts.
  • Page 19 R2051 Series (5) CT2, CT1, and CT0 Periodic Interrupt Selection Bits Description Wave form Interrupt Cycle and Falling Timing mode OFF(H) (Default) Fixed at “L” Pulse Mode 2Hz (Duty50%) Pulse Mode 1Hz (Duty50%) Level Mode Once per 1 second (Synchronized with...
  • Page 20 R2051 Series *1), *2) When the oscillation adjustment circuit is used, the interrupt cycle will fluctuate once per 20sec. or 60sec. as follows: Pulse Mode: The “L” period of output pulses will increment or decrement by a maximum of ±3.784 ms. For example, 1-Hz clock pulses will have a duty cycle of 50 ±0.3784%.
  • Page 21 R2051 Series * When the PON bit is set to 1, all bits will be reset to 0, in the Oscillation Adjustment Register, Control Register 1, and Control Register 2, except XST and PON. As a result, INTR pin stops outputting.
  • Page 22 R2051 Series • Time Counter (Address 0-2h) Second Counter (Address 0h) (For Writing) (For Reading) Indefi Indefi Indefi Indefi Indefi Indefi Indefi Default Settings *) nite nite nite nite nite nite nite Minute Counter (Address 1h) (For Writing) (For Reading)
  • Page 23 R2051 Series * Correspondences between days of the week and the day-of-week digits are user-definable (e.g. Sunday = 0, 0, 0) * The writing of (1, 1, 1) to (W4, W2, W1) is prohibited except when days of the week are unused.
  • Page 24 R2051 Series • Oscillation Adjustment Register (Address 7h) (For Writing) (For Reading) Default Settings *) *) Default settings: Default value means read / written values when the PON bit is set to “1” due to VDD power-on from 0 volts.
  • Page 25 R2051 Series Alarm_W Registers (Address 8-Ah) Alarm_W Minute Register (Address 8h) WM40 WM20 WM10 (For Writing) WM40 WM20 WM10 (For Reading) Indefi Indefi Indefi Indefi Indefi Indefi Indefi Default Settings *) nite nite nite nite nite nite nite Alarm_W Hour Register (Address 9h)
  • Page 26 R2051 Series Example of Alarm Time Setting Alarm Day-of-week 12-hour mode 24-hour mode Preset alarm Sun. Mon. Tue. Wed. Fri. Sat. time 00:00 a.m. on all days 01:30 a.m. on all days 11:59 a.m. on all days 00:00 p.m. on Mon.
  • Page 27 R2051 Series Interfacing with the CPU The R2051 employs the I C-Bus system to be connected to the CPU via 2-wires. Connection and system of C-Bus are described in the following sections. • Connection of I C-Bus 2-wires, SCL and SDA pins that are connected to I C-Bus are used for transmit clock pulses and data respectively.
  • Page 28 R2051 Series duration of SDA and SCL pins are the half of bus operation duration. “× 2” in the numerator of the same member is because there are two pins of SDA and SCL. The third member, (charging/discharging times per unit time) means number of transition from “H”...
  • Page 29 R2051 Series • Transmission System of I C-Bus (1) Start Condition and Stop Condition In I C-Bus, SDA must be kept at a certain state while SCL is at the “H” state during data transmission as shown below. tHD;DAT tSU;DAT The SCL and SDA pins are at the “H”...
  • Page 30 R2051 Series from the master SDA from the transmission side SDA from the receiving side Start Acknowledge Condition signal (3) Data Transmission Format in I C-Bus C-Bus has no chip enable signal line. In place of it, each device has a 7bit Slave Address allocated. The first 1byte is allocated to this 7bit address and to the command (R/W) for which data transmission direction is designated by the data transmission thereafter.
  • Page 31 R2051 Series (4) Data Transmission Write Format in the R2051 Although the I C-Bus standard defines a transmission format for the slave allocated for each IC, transmission method of address information in IC is not defined. The R2051 transmits data the internal address pointer (4bit) and the Transmission Format Register (4bit) at the 1byte next to one which transmitted a Slave Address and a write command.
  • Page 32 R2051 Series (5) Data transmission read format of the R2051 The R2051 allows the following three read out method of data an internal register. The first method to reading data from the internal register is to specify an internal address by setting the internal address pointer and the transmission format register described P31 (4), generate the Repeated Start Condition (See P30 (3)) to change the data transmission direction to perform reading.
  • Page 33 R2051 Series The second method to reading data from the internal register is to start reading immediately after writing to the Internal Address Pointer and the Transmission Format Register. Although this method is not based on I C-Bus standard in a strict sense it still effective to shorten read time to ease load to the master. Set 4h to the transmission format register when this method used.
  • Page 34 R2051 Series Example 3 of data read (when data is read from internal addresses Fh to 3h) R/W=1(Read) Data Data Slave Address Reading of data from Reading of data from ← (0110010) the Internal Address Fh the Internal Address 0h...
  • Page 35 R2051 Series Configuration of Oscillation Circuit and Correction of Time Count Deviations • Configuration of Oscillation Circuit Typical externally-equipped element X’tal : 32.768kHz (R1=30kΩ typ) OSCIN 32kHz Oscillator (CL=6pF to 8pF) Circuit Standard values of internal elements OSCOUT CG,CD 10pF typ The oscillation circuit is driven at a constant voltage of approximately 1.2 volts relative to the level of the VSS pin...
  • Page 36 R2051 Series • Measurement of Oscillation Frequency OSCIN 32768Hz OSCOUT Frequency CLKOUT Counter * 1) The R2051 is configured to generate 32.768-kHz clock pulses for output from the CLKOUT pin. * 2) A frequency counter with 6 (more preferably 7) or more digits on the order of 1ppm is recommended for use in the measurement of the oscillation frequency of the oscillation circuit.
  • Page 37 R2051 Series Course (A) When the time count precision of each RTC is not to be adjusted, the quartz crystal unit intended for use in that RTC may have any CL value requiring no presetting. The quartz crystal unit may be subject to frequency variations which are selectable within the allowable range of time count precision.
  • Page 38 R2051 Series Course (D) It is necessary to select the quartz crystal unit in the same manner as in Course (C) as well as correct errors in the time count of each RTC in the same manner as in Course (B) by the method described in " P38 • Oscillation Adjustment Circuit ".
  • Page 39 R2051 Series Oscillation frequency × 3.051 × 10 ≈ (Oscillation Frequency – Target Frequency) × 10 When DEV=1: Oscillation adjustment value = (Oscillation frequency - Target Frequency) Oscillation frequency × 1.017 × 10 ≈ (Oscillation Frequency – Target Frequency) × 30 Oscillation adjustment value calculations are exemplified below (A) For an oscillation frequency = 32768.85Hz and a target frequency = 32768.05Hz...
  • Page 40 2. Access to R2051 at random, or synchronized with external clock that has no relation to R2051, or synchronized with periodic interrupt in pulse mode. 3. Access to R2051 more than 2 times per each second on average. For more details, please contact to Ricoh. • How to evaluate the clock gain or loss The oscillator adjustment circuit is configured to change time counts of 1 second on the basis of the settings of the oscillation adjustment register once in 20 seconds or 60 seconds.
  • Page 41 R2051 Series Power-on Reset, Oscillation Halt Sensing, and Supply Voltage Monitoring • PON, , and VDET The power-on reset circuit is configured to reset control register1, 2, and clock adjustment register when VDD power up from 0v. The oscillation halt sensing circuit is configured to record a halt on oscillation by 32.768-kHz clock pulses.
  • Page 42 R2051 Series Threshold voltage (2.1V or 1.35V) 32768Hz Oscillation Power-on reset flag (PON) Oscillation halt sensing flag (XST) VDD supply voltage monitor flag (VDET) VDET←0 VDET←0 VDET←0 Internal initialization Internal initialization XST←1 XST←1 XST←1 period (1 to 2 sec.) period (1 to 2 sec.) PON←0...
  • Page 43 R2051 Series • Voltage Monitoring Circuit R2051S/Kxx incorporates two kinds of voltage monitoring function. (R2051Txx incorporates one kind only.) These are shown in the table below. VCC Voltage Monitoring VDD Voltage Monitoring Circuit (except R2051Txx) Circuit (VDET) Purpose CPU reset output...
  • Page 44 R2051 Series The VCC supply voltage monitor circuit operates always. When VCC rising over +V , SW1 turns on, and SW2 DET1 turns off. And tDELAY after rising VCC, VDCC outputs OFF(H). But when oscillation is halt, VCC outputs OFF(H) tDELAY after oscillation starting. When VCC falling beyond -V SW1 turns off, and SW2 turns on.
  • Page 45 R2051 Series Alarm and Periodic Interrupt The R2051 incorporates the alarm interrupt circuit and the periodic interrupt circuit that are configured to generate alarm signals and periodic interrupt signals for output from the INTR pin as described below. R2051Txx has these functions registers, but does not have the INTR output pin.
  • Page 46 R2051 Series drive high (disable) the alarm interrupt circuit when set to 0. The enable bits will not be affected even when the flag bits are set to 0. In this event, therefore, the alarm interrupt circuit will continue to function until it is driven low (enabled) upon the next occurrence of a match between current time and preset alarm time.
  • Page 47 R2051 Series *1) Pulse Mode: 2-Hz and 1-Hz clock pulses are output in synchronization with the increment of the second counter as illustrated in the timing chart below. CTFG Bit INTR Pin Approx. 92 µ s (Increment of second counter) Rewriting of the second counter In the pulse mode, the increment of the second counter is delayed by approximately 92 µs from the falling...
  • Page 48: Typical Applications

    R2051 Series Typical Applications • Typical Power Circuit Configurations The case of back-up by The case of back-up by The case of back-up by capacitor or secondary battery primary battery capacitor or secondary battery (Charging voltage is equal to CPU...
  • Page 49 R2051 Series • Connection of CIN pin Please connect capacitor over 0.1µF between CIN and VSS pin. • Connection of Pin (except R2051Txx) INTR VDCC The INTR and VDCC pins follow the N-channel open drain output logic and contains no protective diode on the power supply side.
  • Page 50: Typical Characteristics

    R2051 Series Typical Characteristics • Time keeping current (I ) vs. Supply voltage (V (Topt=25°C) Test Circuit OSCIN INTR OSCOUT VDCC CLKOUT 0.1µF 0.1µF VSB(v) • Stand-by current (I ) vs. Supply voltage (V (Topt=25°C) Test circuit OSCIN R2051x01 INTR...
  • Page 51 R2051 Series • Stand-by current (I ) vs. Operating Temperature (Topt) Test circuit OSCIN INTR OSCOUT VDCC =3v(R2051x01/02) CLKOUT 0.1µF 0.1µF Operating temperature (Celsius) • CPU access current vs. SCL clock frequency (kHz) (Topt=25°C) SCL clock frequency (KHz) • Oscillation frequency deviation (∆f/f0) vs. Operating temperature (Topt) =3V) Topt=25°C as standard...
  • Page 52 R2051 Series • Frequency deviation (∆f/f0) vs. Supply voltage (V (Topt=25°C) V =3V as standard Test circuit OSCIN INTR OSCOUT VDCC Frequency CLKOUT counter 0.1µF 0.1µF VCC/VSB(v) • Frequency deviation (∆f/f0) vs. CGout (Topt=25°C, V =3V) CGout=0pF as standard Test circuit...
  • Page 53 R2051 Series (R2051S03) Test circuit OSCIN DET1 INTR OSCOUT VDCC DET1 CLKOUT 0.1µF 0.1µF Operating temperature Topt(°C) • VCC-VDD(V ) vs. Output load current (I DDOUT1 OUT1 (Topt=25°C) Test circuit OSCIN -0.1 INTR OSCOUT -0.2 VDCC -0.3 =2.5V CLKOUT -0.4 0.1µF...
  • Page 54 R2051 Series • • V vs. I pin) (Except R2051Txx) vs. I INTR pin) (Except R2051Txx) VDCC (Topt=25°C, V =2V) (Topt=25°C) IOL(mA) IOL(mA)
  • Page 55 R2051 Series Typical Software-based Operations • Initialization at Power-on Start Power-on PON=1? VDET=0? Set Oscillation Adjustment Register and Control Register 1 and 2, etc. Warning Back-up Battery Run-down *1) After power-on from 0 volt, the process of internal initialization require a time span on 1sec, so that access should be done after VDCC turning to OFF(H).
  • Page 56 R2051 Series • Reading Time and Calendar Data (1) Ordinary Process of Reading Time and Calendar Data *1) When reading to clock and calendar counters, do not insert Stop Condition until all times from second to year have been Start Condition written to prevent error in writing time.
  • Page 57 R2051 Series (3) Applied Process of Reading Time and Calendar Data with Periodic Interrupt Function (Except R2051Txx) Time data need not be read from all the time counters when used for such ordinary purposes as time count indication. This applied process can be used to read time and calendar data with substantial reductions in the load involved in such reading.
  • Page 58 R2051 Series • Interrupt Process (1) Periodic Interrupt (except R2051Txx) Set Periodic Interrupt Cycle Selection Bits *1) This step is intended to select the level mode as a waveform mode for the periodic interrupt function. *2) This step is intended to set the CTFG bit to 0...

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