Uhf Transmitter Circuits; Pll Circuits - Icom IC-W2A Service Manual

3-4
UHF TRANSMITTER
CIRCUITS
3-4-1
MIC
AMP
CIRCUIT (UHF
RF
UNIT)
The
audio
signal
from
the
LOGIC
UNIT
is
applied
to
the
low
level
amplifier
in
the
mic
amplifier circuit
with
pre-emphasis
at
IC8a.
Then,
the
audio
signal
is
applied
to
the
limiter
amplifier
(IC8b).
3-4-2
MODULATION
CIRCUIT
(UHF
RF
AND
U
VCO
UNITS)
The
audio
signal
from IC8
(pin 7)
changes
the
reactance
of
a
diode (D1)
to
modulate
the
oscillated signal at
the
VCO
circuit
(01,
02) on
the
U
VCO
UNIT.
The
oscillated signal
is
ampli-
fied at
the
buffer amplifiers (015,
033
and
IC7)
and
then
is
applied
to
the
drive amplifier
circuit.
3-4-3
DRIVE
AND POWER
AMPLIFIER CIRCUITS
(UHF
RF
UNIT)
IC1
1
is
a power module which
provides a
stable
5
W
(DC1
3.5
V)
of
output power.
The
drive amplifier (034,
027) and power
amplifier (IC11)
amplify the
VCO
oscillating signal to
an output
level.
The
output
signal
passes through the
APC
circuit
(D16-18) and
bandpass
circuit
and
is
applied
to
the
antenna
connector.
Collector voltage
for
the
drive amplifier (027)
is
controlled
by
the
APC
circuit.
3-4-4
APC
CIRCUIT (UHF RF
UNIT)
The
APC
circuit
detects the output signal
from the
power
module
(IC1
1
,
pin
5).
Q24
compares
the voltages
detected by
the
APC
to
the reference voltages.
When
a voltage detected
by
APC
exceeds a
reference voltage,
024
reduces the
collec-
tor
voltage
of
025
and 026.
This voltage
is
applied
to
the
drive amplifier (027) to
reduce
the
RF
output power.
IC11
3-5
PLL CIRCUITS
3-5-1
GENERAL
(VHF
AND
UHF RF
UNITS)
A
PLL
circuit
provides stable
oscillation of the transmit
fre-
quency and
the receive
local
frequency.
The PLL
circuit
com-
pares
the
phase
of
the divided
VCO
frequency
to
the
reference frequency.
The PLL
output
frequency
is
controlled
from a
crystal oscillator
and
the divided
ratio of
a
programmed
divider.
The PLL
circuit,
using a
one
chip
PLL
1C
(VHF:
IC8,
UHF:
IC6), directly
generates
the transmit
and
1st
LO
frequency
with a
VCO.
The PLL
1C sets the divided
ratio
based on
serial
data from
the
CPU
on
the
LOGIC
UNIT and compares
the
phases
of
a
VCO
signal
and
the reference
oscillator fre-
quency.
The PLL
1C detects the out-of-step
phase and
output
from
pin 12.
The
reference frequency
is
oscillated at
X3.
OUTPUT
PLL
IN
REF. N
PLL CIRCUIT
PLL
1C
HDH
Crystal
oscillator
LOW-PASS
FILTER
VCO
3
—
3