1. Manuals
  2. Brands
  3. Arrow Manuals
  4. Microcontrollers
  5. AXE5-Eagle
  6. User manual

Arrow AXE5-Eagle User Manual

Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
AXE5-Eagle User Guide

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the AXE5-Eagle and is the answer not in the manual?

Questions and answers

Related Manuals for Arrow AXE5-Eagle

Summary of Contents for Arrow AXE5-Eagle

  • Page 1 AXE5-Eagle User Guide...

  • Page 2: Document Control

    Document Classification: Document All specifications, procedures, and processes Distribution: described in this document are subject to change without prior notice Prior Version History: Version: 0.6 Please read the legal disclaimer at the end of this document. Page | 2 arrow.com...

  • Page 3: Table Of Contents

    Development Board Setup ......................14 System Power ................................ 14 DIP Switch Settings ............................15 Board Status Elements ............................. 17 Connections and Peripherals of the AXE5-Eagle Development Kit ......18 Clock Circuitry ..............................18 C Structure ................................21 4.2.1 Power and System Control ......................... 22 4.2.2...
  • Page 4 Power Sequence ............................58 4.4.3 Thermal Protection ..........................59 Software and Driver Installation ....................61 Installing Quartus Prime Software ......................61 Installing Arrow USB Programmer2 ......................63 License ..................................65 Appendix............................67 Revision History ..............................67 Legal Disclaimer ..............................68 Page | 4 arrow.com...
  • Page 5 Figure 35 – Arrow USB Blaster in Device Manager ....................65 Figure 36 – Arrow USB Blaster listing ........................... 65 Figure 37 – Arrow USB Blaster as Serial COM port ....................65 Figure 38 – Acquiring Agilex 5 Quartus License ..................... 66 Page | 5 arrow.com...

  • Page 6: Axe5-Eagle Development Kit

    64-bit Linux or Microsoft Windows 10, Windows 11, or later operating system. 1.2 Useful Links A set of useful links that can be used to get relevant information about the AXE5-Eagle development kit or the Agilex 5 FPGA and FPGA SoC. AXE5-Eagle at Arrow Shop •...

  • Page 7: Getting Help

    The meaning of the icon in this User Guide as follow: This icon signposts warnings and important items that must be taken care of and needs to be aware of when operating the AXE5-Eagle Development Kit. Page | 7 arrow.com...

  • Page 8: Introduction To The Axe5-Eagle Board

    Figure 1 and Figure 2 show the top and the bottom view of the board. It depicts the layout of the board and indicates the location of the various connectors and key components. Figure 1 – AXE5-Eagle Board (top view) Figure 2 – AXE5-Eagle Board (bottom view) Page | 8 arrow.com...

  • Page 9: Block Diagram

    Agilex SoC FPGA device to provide maximum flexibility for users. Users can configure the FPGA to implement any system design. A complete set of schematics and other board relevant files are available at Trenz Electronic. Figure 3 – AXE5-Eagle Block Diagram Page | 9 arrow.com...

  • Page 10: Board Features

    AXE-5 Eagle Development Kit: User Guide 2.3 Board Features The following features are available on the AXE5-Eagle board: System FPGA Device: Intel Agilex® 5 E-Series SoC FPGA device: • A5ED065BB32AE4SR0 (Engineering Silicon) • A5ED043BB32AE4S (Production FPGA) • Features of the SoC FPGAs on the AXE5-Eagle Board:...

  • Page 11: Buttons And Indicators

    ADC analog input: 0 to +2.5 V ADC digital input: 0 to +3.3 V These values represent maximums. The VCCIO voltages are adjustable via DIP switches, thus their actual values might vary depending on the exact configuration. Page | 11 arrow.com...
  • Page 12 AXE-5 Eagle Development Kit: User Guide Mechanical PCIe standard form factor (full height, 3/4 length) • 165mm  241 mm board size • Air-cooled heatsink and optional fan • Page | 12 arrow.com...

  • Page 13: Ordering Information

    Core Device Part Number ES version AXE5-Eagle-ES A5ED065BB32AE4SR0 Production (Q2 2025) AXE5-Eagle A5ED043BB32AE4S 2.5 Box Contents The AXE5-Eagle Development Kit includes the following hardware: AXE5-Eagle development board • 12VDC 40 W Power supply • Arrow USB Programmer2 • Micro USB cable •...

  • Page 14: Development Board Setup

    Note: Before the AXE5-Eagle board is powered through the PCIe slot, ensure that the host PCIe system is able to deliver a minimum of 75W on the 12V power rail. If this requirement is not met, the board should be powered using the ATX Power Supply System.

  • Page 15: Dip Switch Settings

    AXE-5 Eagle Development Kit: User Guide 3.2 DIP Switch Settings There are switches on the AXE5-eagle development kit that affect the basic functionality of the board. These switches offer the ability to modify configurations and peripheral accesses and adjust circuit settings.
  • Page 16 FPGA_SW2 PIN_CL54 FPGA user input Adjustable* FPGA_SW3 PIN_CK63 FPGA user input Adjustable* * “1.2V True Differential Signaling” or “1.3V True Differential Signaling”. Depending on FMC_ADJ setting. Note: Without proper anti-static handling, you can damage the board. Page | 16 arrow.com...

  • Page 17: Board Status Elements

    AXE-5 Eagle Development Kit: User Guide 3.3 Board Status Elements The Arrow AXE5-Eagle development kit has overall 6 user-controlled LEDs and 3 board-specific status LEDs that indicate the status of the board. The following figure shows the status LED areas of the board.

  • Page 18: Connections And Peripherals Of The Axe5-Eagle Development Kit

    Development Kit 4.1 Clock Circuitry On the AXE5-Eagle board, the Intel Agilex 5 receives clock signals from multiple clock sources to ensure that the correct clock signal is directly available for different applications and interfaces. The devkit contains two type of clock circuits: •...

  • Page 19: Figure 6 - Simplified Clock Connection Diagram

    AXE-5 Eagle Development Kit: User Guide Figure 6 – Simplified Clock Connection Diagram Page | 19 arrow.com...
  • Page 20 ** “1.2V True Differential Signaling” or “1.3V True Differential Signaling”. Depending on CRUVI_ADJ. Note: For True Differential Signaling, Input Termination must be set to “differential”. Off-Board Clock I/Os For detailed pinout information regarding off-board clock I/Os, please refer to the section associated with the respective connector. Page | 20 arrow.com...

  • Page 21: I 2 C Structure

    C for reading and writing to the various components on the board and have option to utilize it as the I C host for accessing the devices, adjusting clock frequencies, obtaining board status data or accessing EEPROM memory. Figure 7 – I C Block Diagram Page | 21 arrow.com...

  • Page 22: Power And System Control

    The Intel FPGA documentation provides detailed information on setting up and using SmartVID*. * Installed Group B devices do not support SmartVID. Feature is reserved for the future. Default SFP+ I C address, it may differ depending on the exact device. Page | 22 arrow.com...

  • Page 23: I 2 C Mux And Fpga Peripherals

    To select a channel, do an I2C write with the value in the channel select column to the MUX TCA9544 (U57) at I2C address 0x70. Page | 23 arrow.com...

  • Page 24: Figure 8 - I2C Mux Connections

    AXE-5 Eagle Development Kit: User Guide Figure 8 – I2C MUX Connections Page | 24 arrow.com...

  • Page 25: Peripherals Connected To The Agilex 5 Soc Fpga

    The information is retained within flash memory even if the AXE5-Eagle is turned off. When the board is powered on, the configuration data in the flash memory is automatically loaded into the Agilex 5 FPGA.

  • Page 26: Jtag Chain Configuration

    Chapter 4.3.1.1 JTAG Chain Configuration The JTAG Chain Configuration is controlled by an Arrow USB Programmer2 module which is a development tool for Intel FPGAs and supported by Intel Quartus Prime. For connection to the AXE5-Eagle board, there is used the standard JTAG header. The following diagram illustrates its connection.

  • Page 27: Qspi Configuration Flash Memory

    AXE-5 Eagle Development Kit: User Guide 4.3.1.2 QSPI Configuration Flash Memory The AXE5-Eagle board is integrated with a 2 Gbit of QSPI flash memory that can be used for user data and programming non-volatile storage. The configuration bitstream is downloaded into the configuration device which automatically loads the configuration data into the Agilex 5 when the board is powered on.

  • Page 28: Memory Interfaces

    4.3.2.1 LPDDR4 memory The AXE5-Eagle board supports single-chip LPDDR4 with 8 Gbit density, operating at a speed of 2133 MHz, for both the FPGA and the HPS parts. Below are the connections and pinning of the LPDDR4 used in the AXE5-Eagle.
  • Page 29 1.1-V LVSTL LPDDR4A_DMA0 PIN_B119 Bidir Data mask/Data bus inversion LPDDR4A_DMA1 PIN_F105 Bidir Data mask/Data bus inversion 1.1-V LVSTL LPDDR4A_DMB0 PIN_H87 Bidir Data mask/Data bus inversion 1.1-V LVSTL LPDDR4A_DMB1 PIN_B97 Bidir Data mask/Data bus inversion 1.1-V LVSTL Page | 29 arrow.com...
  • Page 30 Bidir Data [24] PIN_CH71 1.1-V LVSTL LPDDR4B_DQ25 Bidir Data [25] PIN_CC71 1.1-V LVSTL LPDDR4B_DQ26 Bidir Data [26] PIN_CA71 1.1-V LVSTL LPDDR4B_DQ27 Bidir Data [27] LPDDR4B_DQ28 PIN_CF62 Bidir Data [28] 1.1-V LVSTL Continued on the next page Page | 30 arrow.com...

  • Page 31: Microsd Card

    Data mask/Data bus inversion 4.3.2.2 MicroSD Card The AXE5-Eagle board features a microSD card interface with x4 data lanes, primarily designed to function as an external storage solution for the HPS. The SD card can also be utilized for booting purposes, allowing for firmware execution directly from the card. Additionally, the SD card socket is equipped with a Card Detect pin, facilitating automatic detection of card insertion or removal, enhancing system responsiveness and user convenience.

  • Page 32: Data Communication Interfaces

    1.8-V LVCMOS 4.3.3 Data Communication Interfaces The AXE5-Eagle development board offers various data communication interfaces, including Ethernet, SFP+, USB 3.1, HDMI, and PCIe, ensuring high-level integration in an extensive range of applications. From high-speed data transfer with Ethernet and PCIe to multimedia capabilities with HDMI, this board provides adaptable solutions tailored to diverse requirements.
  • Page 33 Receive data [0] 1.8-V LVCMOS PIN_D8 ETH1_RXD1 Input Receive data [1] 1.8-V LVCMOS PIN_H8 ETH1_RXD2 Input Receive data [2] 1.8-V LVCMOS PIN_C2 ETH1_RXD3 Input Receive data [3] 1.8-V LVCMOS ETH1_RST PIN_F27 Output PHY Reset 1.8-V LVCMOS Page | 33 arrow.com...

  • Page 34: Sfp+ Interfaces

    Signal loss indicator Adjustable** SFPA_SDA / PIN_F4 Bidir Serial Data Line 1.8-V LVCMOS MUX_I2C_SDA SFPA_SCL / PIN_D4 Bidir Serial Clock Line 1.8-V LVCMOS MUX_I2C_SCL ** “1.2V True Differential Signaling” or “1.3V True Differential Signaling”. Depending on CRUVI_ADJ. Page | 34 arrow.com...

  • Page 35: Hdmi Transmitter

    Agilex 5 SoC FPGA through the I2C MUX device. Additionally, the HDMI interface supports single-wire SPDIF (Sony/Philips Digital Interface Format) audio transmission up to 192 kHz sampling rate. Detailed information on using ADV7511 HDMI Transmitter is available on the manufacturer's website. Figure 15 – HDMI Transmitter Connection Page | 35 arrow.com...
  • Page 36 Serial Clock Line 1.8-V LVCMOS CEC_CLK PIN_BF25 Output CEC Clock 1.8-V LVCMOS CT_HPD PIN_BW19 Output Hot Plug Detect Control 1.8-V LVCMOS For detailed information about the I C connection, please refer to the C Structure section. Page | 36 arrow.com...

  • Page 37: Pci Express Gen4

    AXE-5 Eagle Development Kit: User Guide 4.3.3.4 PCI Express Gen4 The AXE5-Eagle Development Kit provides PCIe-compliant multi-lane edge connectivity through the integrated transceivers and PCIe hard IP block of the Intel Agilex 5 SoC FPGA. Integration of the PCI Express hard IP block within the Agilex 5 device empowers users to deploy an efficient, high-speed protocol, all while optimizing logic resources for the logic application.

  • Page 38: Usb 3.1 Gen1

    AXE-5 Eagle Development Kit: User Guide 4.3.3.5 USB 3.1 Gen1 The AXE5-Eagle board features a Microchip’s USB5734 USB Hub that offers a total of four USB-A connectivity options. This USB Hub is fully compliant with the USB 3.1 Gen1 specification and supports High Speed, Full Speed and Low-Speed USB signalling.

  • Page 39: Usb To Uart Bridge

    3.3-V LVCMOS 4.3.3.6 USB to UART Bridge Besides the USB 3.1 Gen1 interfaces, the AXE5-Eagle board uses an additional FT234XD chip to perform UART communication over USB. The FTDI chip converts signals from USB 2.0 to a standard serial interface, which is routed to the HPS UART0 module.

  • Page 40: Expansion Connectors

    FMC+ ports can be adjusted by configuring a switch position. The valid values of the VADJ_FMC rail is 1.2 V or 1.3 V which can be adjusted via the S10 DIP switch on the AXE5-Eagle board. For detailed setting, please refer to Switch Settings section.
  • Page 41 FMC_REFCK_M2C_P PIN_CH38 Mezzanine to Carrier Input Adjustable* reference clock FMC_REFCK_M2C_N PIN_CF38 FMC_SYNC_M2C_P PIN_BH49 Mezzanine to Carrier sync Input Adjustable* clock FMC_SYNC_M2C_N PIN_BH52 * “1.2V True Differential Signaling” or “1.3V True Differential Signaling”. Depending on FMC_ADJ setting. Page | 41 arrow.com...
  • Page 42 Differential I/O DP5_M2C_N PIN_AT3 Mezzanine to Carrier High Speed DP6_M2C_P PIN_AP1 Input receiver data pair[6] Differential I/O DP6_M2C_N PIN_AP3 Mezzanine to Carrier High Speed DP7_M2C_P PIN_AM1 Input receiver data pair[7] Differential I/O DP7_M2C_N PIN_AM3 Page | 42 arrow.com...
  • Page 43 Bidir Adjustable* LA18_P FMC+ LA bank data[18]_p PIN_BM49 Bidir FMC+ LA bank data[18]_n Adjustable* LA18_N PIN_CK73 Bidir Adjustable* LA19_P FMC+ LA bank data[19]_p PIN_CL73 Bidir FMC+ LA bank data[19]_n Adjustable* LA19_N Continued on the next page Page | 43 arrow.com...
  • Page 44 Serial Clock Line 1.8-V LVCMOS PIN_B39 FMC card presence FMC_PRSNT Input 3.3-V LVCMOS indicator Power Good from Carrier PG_GROUP3 3.3-V LVCMOS to Mezzanine For detailed information about the I C connection, please refer to the C Structure section. Page | 44 arrow.com...

  • Page 45: Cruvi High-Speed Connectors

    Ethernet, camera, and other types of multimedia peripherals. The AXE5-Eagle board provides 5.0 V, 3.3 V and VIO_CRUVI power through CRUVI HS port. The power control of the VIO_CRUVI power rail is managed by the U50 DCDC regulator. This rail powers the VADJ pins of J19 and J21 connectors, as well as the 3B I/O Bank of Agilex 5 SoC FPGA.
  • Page 46 Bidir SMBus Data Clock Line LVCMOS 3.3-V CY_REFCLK PIN_CH128 Input Clock Input LVCMOS 5V power to the connector 3.3V power to the 3.3V 4, 9 connector VIO_CRUVI HS IO Bank voltage Continued on the next page Page | 46 arrow.com...
  • Page 47 HS Differential Data B[5]_n Adjustable** PIN_A63 CX_HSI Input HS Serial In Adjustable** PIN_B45 CX_HSIO Bidir HS Serial Data I/O Adjustable** PIN_A48 CX_HSO Output HS Serial Out Adjustable** PIN_A51 CX_RESET Output Serial Reset Adjustable** Continued on the next page Page | 47 arrow.com...

  • Page 48: Cruvi Low-Speed Connectors

    This compact interface simplifies the connection of sensors, communication devices, and other components. Delivering power to the mezzanine board, the AXE5-Eagle board offers both 5.0 V and 3.3 V via the CRUVI LS port. The AXE5-Eagle development board provides two CRUVI LS connection interfaces.

  • Page 49: Figure 21 - Cruvi Ls Connections

    3.3-V LVCMOS PIN_BF115 Bidir CRUVI LS Data [6] 3.3-V LVCMOS PIN_BH118 Bidir CRUVI LS Data [7] 3.3-V LVCMOS 5V power to the 5.0V connector 3.3V power to the 3.3V connector Ground to the connector n.c. Not connected Page | 49 arrow.com...

  • Page 50: Mipi D-Phy

    Camera Serial Interface (CSI-2) and the Display Serial Interface (DSI-2) at a data rate of 2.5 Gbps per lane. The AXE5-Eagle board does not have standalone connection for MIPI interface, it is accessible through the CRUVI HS ports. For more information about CRUVI HS connections, please refer to CRUVI High-Speed Connectors section.
  • Page 51 CY_A3_N PIN_T67 CY_A2_P PIN_M65 Bidir MIPI DSI-2 Data Lane [3] Adjustable** CY_A2_N PIN_K65 CY_B0_P PIN_M74 Bidir MIPI DSI-2 Clock Lane Adjustable** CY_B0_N PIN_K74 ** “1.2V True Differential Signaling” or “1.3V True Differential Signaling”. Depending on CRUVI_ADJ Page | 51 arrow.com...

  • Page 52: Miscellaneous Interfaces

    4.3.5.1 Analog Interface The AXE5-Eagle board is equipped with Analog Devices’ AD5592R multipurpose chip which is an 8-channel, 12-bit, configurable analog-to-digital, digital-to-analog converter with GPIO capabilities. It allows for handling both analog and digital data, supporting various configurations for sensing, measuring, and control functions.

  • Page 53: Figure 23 - Adc/Dac Connections

    Analog Analog I/O Channel [5] ADDA_IO6 Analog Analog I/O Channel [6] ADDA_IO7 Analog Analog I/O Channel [7] 3.3V 3.3V power to the connector 1, 2, 3, 5, 7, 9, 11, 13, Ground to the connector 15, 17, 19, Page | 53 arrow.com...

  • Page 54: User-Defined Leds

    AXE-5 Eagle Development Kit: User Guide 4.3.5.2 User-defined LEDs The AXE5-Eagle board integrates four RGB LEDs directly connected to the FPGA, offering extensive user control over colours and illumination. Furthermore, there are two green user- controllable LEDs linked to the HPS, providing additional visual indicators. Each LED is individually addressable, offering precise control and illumination options, thereby enabling diverse applications and customizable visual feedback within the Agilex 5 SoC FPGA applications.

  • Page 55: User Buttons

    HPS GPIO0_IO7 LED 1.8-V LVCMOS 4.3.5.3 User Buttons The AXE5-Eagle board has seven push buttons connected to the SoC FPGA that allows user to interact with the Agilex 5 device. The buttons have different functions: • 2 buttons connected to the HPS as user-defined push buttons •...

  • Page 56: Figure 25 - Push Button Connections

    PIN_B30 Input 3.3-V LVCMOS FPGA_PB2 FPGA user button PIN_A30 Input 3.3-V LVCMOS FPGA_PB3 FPGA user button PIN_CK134 Input 3.3-V LVCMOS FPGA reset HPSRST PIN_CH109 Input HPS reset 1.8-V LVCMOS NCONFIG PIN_BU99 Input nCONFIG trigger 1.8-V LVCMOS Page | 56 arrow.com...

  • Page 57: Power Distribution System

    AXE5-Eagle board operations. 4.4.1 Power Tree The AXE5-Eagle is designed with a flexible power system that accommodates multiple power source options, including PCIe connectors and standalone power inputs. Employing diverse configurations with compact, small-footprinted power modules ensures reliable power delivery to the board and the connected mezzanine cards.

  • Page 58: Power Sequence

    AXE-5 Eagle Development Kit: User Guide 4.4.2 Power Sequence Intel Agilex 5 SoC FPGA requires power-up sequencing. The AXE5-Eagle power system organizes power rails into power groups and enables them in the appropriate sequence for the Agilex 5 device. Figure 27 – Power Sequence Page | 58 arrow.com...

  • Page 59: Thermal Protection

    AXE-5 Eagle Development Kit: User Guide 4.4.3 Thermal Protection The AXE5-Eagle board is equipped with a heatsink and cooling fan to manage the Agilex 5 device power dissipation, and it is designed to operate in a typical laboratory environment with an ambient temperature of approximately 25 °C.

  • Page 60: Figure 29 - Cooling Solution

    PIN_BF100 I2C0_SDA PIN_U134 Bidir Serial Data Line of I2C0 1.8-V LVCMOS I2C0_SCL PIN_AL120 Bidir Serial Clock Line of I2C0 1.8-V LVCMOS For detailed information about the I C connection, please refer to the C Structure section. Page | 60 arrow.com...

  • Page 61: Software And Driver Installation

    AXE-5 Eagle Development Kit: User Guide Software and Driver Installation The using and programming of the AXE5-Eagle development board require various program installation of which are detailed in this section. First, it is necessary to create your Basic Intel Account if you do not already have one.

  • Page 62: Figure 31 - Quartus Prime Pro Elements

    After the download is finished, run the Quartus Prime installer. 5.1.5 When prompted to select the components, the installer will automatically detect the Agilex 5 device support and Questa packages when they are in the same folder. Make sure these components are selected: Page | 62 arrow.com...

  • Page 63: Installing Arrow Usb Programmer2

    Arrow USB Programmer2 to be able to connect to the AXE5-Eagle board. 5.2 Installing Arrow USB Programmer2 The AXE5-Eagle board uses version 2 of the Arrow USB Programmer2 programming solution, that is an FTDI FT2232H Hi-Speed USB controller plus a programmer DLL. Since this FTDI USB controller is a very common standard device, usually no specific drivers are needed to make the AXE5-Eagle work.

  • Page 64: Figure 33 - Arrow Usb Programmer Driver Installation

    Make sure that the Arrow USB Programmer2 module is connected to the AXE5-Eagle board correctly. Figure 34 – TEI0004 Arrow USB Programmer 5.2.4 After connecting the AXE5-Eagle board to the PC, two unknown devices might appear in the “Other devices” section of device manager of the PC. Page | 64 arrow.com...

  • Page 65: License

    Furthermore, a USB Serial Port should be listed in the “Ports (COM & LPT)” section. Figure 37 – Arrow USB Blaster as Serial COM port Note that the number of the port will most probably be different from the one shown here.

  • Page 66: Figure 38 - Acquiring Agilex 5 Quartus License

    Choose the computer you created and check the box agreeing to the license use terms. 5.3.9 Click the Generate button. 5.3.10 Repeat for Questa*-Intel FPGA Starter Edition SW-QUESTA option. The license file will be provided by email, or you can also download it under Intel FPGA Self-Service Licensing Center. Page | 66 arrow.com...

  • Page 67: Appendix

    Change Log Date of Change V0.3 Preliminary Version release 02/09/2024 V0.4 Updated Version 02/29/2024 V0.5 Updated Version 03/22/2024 V0.6 Updated Version 04/26/2024 V1.0 Final Version (not published) 06/05/2024 V1.1 Updated rev3 PCB changes, removed Tutorials 06/07/2024 Page | 67 arrow.com...

  • Page 68: Legal Disclaimer

    Your sole risk. WARRANTY Arrow warrants that it has the right to provide the evaluation board to you. This warranty is provided by Arrow in lieu of all other warranties, written or oral, statutory, express or implied, including any warranty as to merchantability, non-infringement, fitness for any particular purpose, or uninterrupted or error-free operation, all of which are expressly disclaimed.
  • Page 69 IDENTIFICATION You shall, at Your expense, defend Arrow and its Affiliates and Licensors against a claim or action brought by a third party for infringement or misappropriation of any patent, copyright, trade...

This manual is also suitable for:

Axe5-eagle-esA5ed065bb32ae4sr0A5ed043bb32ae4s

Table of Contents