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Pinout label for the scb-100a, counter/timer tio series modules/devices using the 100-pin shielded connector block (3 pages)
Summary of Contents for National Instruments 6608
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NI PXI-6608 High-Precision Counter / Timer with Digital I/O In Stock Used and in Excellent Condition Open Web Page https://www.artisantg.com/80570-1 A l l t r a d e m a r k s , b r a n d n a m e s , a n d b r a n d s a p p e a r i n g h e r e i n a r e t h e p r o p e r t y o f t h e i r r e s p e c t i v e o w n e r s .
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NI 660x User Manual NI 6601, NI 6602, and NI 6608 Devices NI 660x User Manual Français Deutsch ni.com/manuals December 2012 372119C-01 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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Warranty The NI 6601, NI 6602, and NI 6608 devices are warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period.
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RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION, INCLUDING, WITHOUT LIMITATION, THE APPROPRIATE DESIGN, PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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Furthermore, any modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules.
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When to Use Duplicate Count Prevention............2-7 When Not to Use Duplicate Count Prevention..........2-7 Transfer Rates ........................2-8 High Precision Clock (NI 6608) ..................2-9 Using the OCXO as the SOURCE Counter ............2-9 Using the OCXO as the 10 MHz PXI Backplane Clock .........2-9 Measuring OCXO Stable Frequency Deviation ..........2-11...
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Contents Counters......................... 3-9 Counter n Source Signal ................. 3-9 Counter Source to Counter Out Delay..........3-11 Counter n Gate Signal ..................3-11 Counter n Auxiliary Signal ................3-12 Counter n Internal Output Signal ..............3-13 Hardware Arm Start Triggers ................. 3-13 Counter Pairs....................
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About This Manual This manual describes the electrical and mechanical aspects of the National Instruments NI 6601, NI 6602, and NI 6608 devices, and contains information about device operation and programming. Unless otherwise noted, text applies to all NI 660x devices. The PCI and PXI implementations are the same in functionality;...
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About This Manual • DAQ Assistant Help—Contains information about creating and configuring channels, tasks, and scales using the DAQ Assistant. For more information, in Measurement& Automation Explorer (MAX), select Help»Help Topics»NI-DAQmx»DAQ Assistant. • PXI Hardware Specifications Revision 2.1—Introduces the PXI architecture and describes the electrical, mechanical, and software requirements for PXI.
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TTL/CMOS-compatible digital I/O. The NI 6602 offers this capability and four additional 32-bit counter channels. The NI 6608 is a functional superset of the NI 6602 device with a high-stability clock called an oven-controlled crystal oscillator (OCXO). The counter/timer channels have many measurement and generation...
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Chapter 1 Introduction sub-buses and PXI. The standard implementation for CompactPCI does not include these sub-buses. The PXI TIO Series device works in any CompactPCI chassis adhering to the PICMG 2.0 R3.0 core specification. PXI-specific features are implemented on the J2 connector of the bus. The PXI device is compatible with any chassis with a sub-bus that does not drive the lines used by that device.
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Chapter 2 Device Overview Figure 2-1 shows an example of prescaling. External Signal Prescaler Rollover (Used as Source by Counter) Counter Value Figure 2-1. Prescaling Example Prescaling is intended for use with two counter period and frequency measurements where the measurement is made on a continuous, repetitive signal.
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Chapter 2 Device Overview Example Application That Works Incorrectly (Duplicate Counting) In Figure 2-5, after the first rising edge of Gate, no Source pulses occur. So the counter does not write the correct data to the buffer. No Source edge, so no value written to buffer.
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Chapter 2 Device Overview Transfer Rates The maximum sustainable transfer rate a TIO device can achieve for a buffered acquisition depends on the following factors: • Amount of available bus bandwidth • Processor speed and operating system • Application software To reduce the amount of bus activity, limit the number of devices generating bus cycles.
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To use the OCXO 10 MHz clock as the PXI backplane clock, plug the NI PXI-6608 device into Slot 2, or the slot immediately to the right of the controller of the PXI chassis. By default, NI-DAQ software drives the 10 MHz clock from the OCXO onto the PXI CLK10 in pin so that the OCXO is used as the PXI backplane clock.
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The PXI CLK10 in pin is used as the PXI Star pin in other slots. The PXI Star pin is not used for the PXI backplane clock. PXI Backplane NI PXI-6608 in Slot 2 10 MHz of PXI Chassis TIO(0)
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Device Overview Measuring OCXO Stable Frequency Deviation When you power the NI 6608 device, the OCXO requires adequate warm-up time to reach stable frequency. Five minutes is adequate warm-up time for a power-off duration of less than one hour, with maximum deviation within 20 ppb, or parts per billion, while four hours of operation is adequate for a power-off duration of up to 90 days.
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When you are ready to calibrate your device to correct for drift in frequency, refer to the NI 6601/6602 Calibration Procedure or the NI 6608 Timing I/O Device Calibration Procedure. You can calibrate these devices in Traditional NI-DAQ (Legacy) only.
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Chapter 3 Signal Connections consecutive rising edges of the filter clock. The frequency of the filter clock timebase determines whether a transition in the signal may propagate or not. The function of the internal sampling clock is to increase the sampling rate and prevent aliasing.
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I/O Connector Pinout Figure 3-2 shows the pinout of the NI 6601. Figure 3-3 shows the pinout of the NI 6602/6608. The descriptions beside each pin are in the following format: Signal Name / DIO Context / Counter Context (Default).
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Chapter 3 Signal Connections Note The NI 6601 uses counters <0..3> only. PFI 31/P0.31/CTR 2 SOURCE D GND D GND PFI 30/P0.30/CTR 2 GATE PFI 28/P0.28/CTR 2 OUT PFI 29/P0.29/CTR 2 AUX PFI 27/P0.27/CTR 3 SOURCE D GND D GND PFI 26/P0.26/CTR 3 GATE PFI 24/P0.24/CTR 3 OUT PFI 25/P0.25/CTR 3 AUX...
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Chapter 3 Signal Connections Table 3-3. PFI Lines Used as Outputs (Continued) PFI Line Possible Signals PFI 15 P0.15 or CTR 6 SOURCE PFI 16 P0.16 or CTR 5 OUT PFI 17 P0.17 PFI 18 P0.18 or CTR 5 GATE PFI 19 P0.19 or CTR 5 SOURCE PFI 20...
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The counters on TIO devices have two internal timebases: 100 kHz and 20 MHz. The counters on the NI 6602 and NI 6608 also have an 80 MHz timebase. Each counter has a gate, auxiliary, and source input. Each of these inputs can be an internal or external signal that connects to the I/O connector.
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Chapter 3 Signal Connections Figure 3-4 shows the timing requirements for the CtrnSource signal. Tsrcper Tsrcpw CtrnSource Tgatepw Figure 3-4. Timing Requirements for CtrnSource Signal Figure 3-4 shows the minimum pulse width and period that you must use for the CtrnSource signal. This signal must satisfy both minimum criteria. If the high phase of the CtrnSource signal is Tsrcpw ns, the low phase must be Tsrcper - Tsrcpw.
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Chapter 3 Signal Connections You can export the CtrnGate signal to the I/O connector’s default PFI input for each CtrnGate. For example, you can export the gate signal connected to counter 0 to the PFI 38/CTR 0 GATE pin, even if another PFI is inputting the Ctr0Gate signal.
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NI-DAQmx Help, and/or use the examples that are available with NI-DAQmx. Real-Time System Integration Bus TIO devices use the National Instruments Real-Time System Integration (RTSI) bus to easily synchronize several measurement functions to a common trigger or timing event. In a PCI system, the RTSI bus consists of the RTSI bus interface and a ribbon cable.
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Do not connect the +5 V power pin directly to D GND, R GND, or any pin configured for output on NI 660x devices, or any voltage source or output pin on another device. Doing so can damage the device and the computer. National Instruments is not liable for damages resulting from such a connection.
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Chapter 3 Signal Connections Cable PFI 11 Capacitance PFI 10 PFI 10 PFI 11 Figure 3-10. Crosstalk Example In Figure 3-10, PFI 10 and PFI 11 are configured as inputs. V drives PFI 10 and V drives PFI 11. When PFI 10 (the offending line) transitions from one state to another, it induces a small transition in PFI 11 (the victim line).
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Chapter 3 Signal Connections Figure 3-12 shows an example of parallel and series termination. Driving Signal Receiving Signal Receiving Signal Driving Signal Other Other 660x 660x Device Device Parallel Termination Series Termination Figure 3-12. Parallel and Series Termination Example NI 660x User Manual 3-22 ni.com Artisan Technology Group - Quality Instrumentation ...
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Appendix A Technical Support and Professional Services Alliance Partner members can help. To learn more, call your local NI office or visit ni.com/alliance • Declaration of Conformity (DoC)—A DoC is our claim of compliance with the Council of the European Communities using the manufacturer’s declaration of conformity.
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