MSI MS-6528LE User Manual page 62

(v2.x) atx mainboard
Table of Contents

Advertisement

BIOS Setup
signals, used when DRAM is written to, read from, or refreshed. Fast gives
faster performance; and Slow gives more stable performance. This field applies
only when synchronous DRAM is installed in the system.
The settings are: 2 and 3.
RAS# Precharge
This item controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If insufficient time is allowed for the RAS to accumulate
its charge before DRAM refresh, refresh may be incomplete and DRAM may
fail to retain data. This item applies only when synchronous DRAM is installed
in the system. The settings are: 2 and 3.
DRAM Data Integrity Mode
Select ECC (Error-Checking & Correcting Code) or Non-ECC according to the
type of DRAM installed.
Memory Hole At 15M-16M
You can reserve this area of system memory for ISA adapter ROM. When this
area is reserved, it cannot be cached. The user information of peripherals that
need to use this area of system memory usually discusses their memory
requirements. The settings are: Enabled and Disabled.
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delayed
transactions cycles so that transactions to and from the ISA bus are buffered
and PCI bus can perform other transactions while the ISA transaction is
underway. Select Enabled to support compliance with PCI specification ver-
sion 2.1. The settings are: Enabled and Disabled.
AGP Aperture Size (MB)
This setting controls just how much system RAM can be allocated to AGP for
video purposes. The aperture is a portion of the PCI memory address range
dedicated to graphics memory address space. Host cycles that hit the aperture
range are forwarded to the AGP without any translation. The option allows the
selection of an aperture size of 4, 8, 16, 32, 64, 128, and 256 (MB).
3-13

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

845 pro2845 pro2-a845 pro2-rMs-6528

Table of Contents