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Wiltron 681 A Series Maintenance Manual

Synthesized sweep generator
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  • Page 1 T h e t e s t & me a s u r e me n t e q u i p me n t y o u n e e d a t t h e p r i c e y o u w a n t . A l l t e s t I n s t r u me n t s , I n c .
  • Page 2 SERIES 681XXA SYNTHESIZED SWEEP GENERATOR MAINTENANCE MANUAL 490 JARVIS DRIVE P/N: 10370-10252 REVISION: A MORGAN HILL, CA 95037-2809 PRINTED: NOVEMBER 1993 COPYRIGHT 1993 WILTRON CO.

  • Page 3: Limitation Of Warranty

    WARRANTY The WILTRON product(s) listed on the title page is (are) warranted against defects in materials and workmanship for one year from the date of shipment, except for YIG-tuned oscillators and all WILTRON manufactured microwave components, which are warranted for two years.
  • Page 4 TABLE OF CONTENTS Chapter 1 — General Information Chapter 1 provides general description of the the Series 681XXA Synthesized Sweep Generator, its identification number, related manuals, and options. Information is included concerning level of maintenance, exchange assembly program, replaceable subassemblies and RF components, and pre- ventive maintenance.
  • Page 5 Table of Contents (Continued) Appendix A— Test Records Appendix A provides test records for recording the results of the Performance Verification tests (Chapter 3) and the Calibration procedures (Chapter 4). They jointly provide a means of maintain- ing an accurate and complete record of instrument performance. Test records are provided for all models of the Series 681XXA Synthesized Sweep Generator.

  • Page 6: Table Of Contents

    Chapter 1 General Information Table of Contents SCOPE OF MANUAL ....1-3 INTRODUCTION ....1-3 DESCRIPTION .
  • Page 7 Figure 1-1. Series 681XXA Synthesized Sweep Generator...

  • Page 8: Chapter 1 General Information

    Chapter 1 General Information SCOPE OF MANUAL This manual provides service information for all models of the Series 681XXA Synthesized Sweep Generator. The service information in- cludes replaceable parts information, functional circuit descriptions, block diagrams, performance verification tests, and procedures for cali- bration, troubleshooting, and assembly/subassembly removal and re- placement.

  • Page 9: Identification Number

    IEEE 488 General Purpose Interface Bus (GPIB). It contains a general description of the GPIB and bus data transfer and control functions, a comlete listing and description of the 681XXA command codes, and sev- eral examples of bus programming. The WILTRON part number for the PM is 10370-10254. 681XXA MM...

  • Page 10: Options

    0.1 Hz. Option 14, WILTRON 360B VNA Compatibility. Modifies rack mounting hardware to mate unit in a Wiltron 360B VNA console. Option 15, High Power Output. Adds high-power RF compo- nents to the instrument providing 50 mW RF output power in the 2–20 GHz frequency range.

  • Page 11: Startup Configurations

    GENERAL STARTUP INFORMATION CONFIGURATIONS STARTUP The 681XXA comes from the factory with a jumper across pins 1 and 2 CONFIGURATIONS of Motherboard connector J3 (Figure 1-2). In this configuration, con- necting the instrument to line power automatically places it in operate mode (front panel OPERATE LED on).

  • Page 12: Level Of Maintenance

    GENERAL LEVEL OF INFORMATION MAINTENANCE LEVEL OF MAINTENANCE Maintenance of the 681XXA consists of: Troubleshooting the sweep generator to a replaceable subassem- bly or RF component. Repair by replacing the failed subassembly or RF component. Calibration Preventive maintenance. Troubleshoot- The 681XXA firmware includes internal diagnostics that self-test most of the internal assemblies of the sweep generator.

  • Page 13: Preventive Maintenance

    GENERAL PREVENTIVE INFORMATION MAINTENANCE PREVENTIVE The sweep generator must always receive adequate ventilation. Check MAINTENANCE and clean the rear panel fan honeycomb filter periodically. Clean the fan honeycomb filter more frequently in dusty environments. Clean the filter as follows. Step 1 Remove the four thumb nuts holding the fan grill in place (Figure 1-3).

  • Page 14: Static-Sensitive Component Handling Precautions

    GENERAL STATIC-SENSITIVE COMPONENT INFORMATION HANDLING PRECAUTIONS 1. Do not touch exposed contacts 2. Do not slide static sensitive 3. Do not handle static sensitive on any static sensitive component across any surface. components in areas where component. the floor or work surface covering is capable of generating a static charge.

  • Page 15: Recommended Test Equipment

    GENERAL RECOMMENDED INFORMATION TEST EQUIPMENT 1-11 RECOMMENDED TEST Table 1-2 provides a list of recommended test equipment needed for the EQUIPMENT performance verification, calibration, and troubleshooting procedures presented in this manual. Table 1-2. Recommended Test Equipment (1 of 2) CRITICAL RECOMMENDED INSTRUMENT SPECIFICATION...
  • Page 16 Frequency Range: 1 to 26 GHz Mixer RHG Electronics Laboratory, Inc. Model DMS1-26A Frequency Range: 0.01 to 40 GHz C, T Scalar Network WILTRON, Model 562, with Analyzer, with RF Detector: RF Detector 560-7K50 (0.01 to 40 GHz) Adapter K (male) to 2.4 mm (female)

  • Page 17: Exchange Assembly Program

    For more information about the program, contact your local sales repre- sentative or call your local WILTRON service center. Refer to Table 1-5, on page 1-15, for a list of current WILTRON service centers.

  • Page 18: Parts List

    GENERAL INFORMATION PARTS LIST Table 1-3. Replaceable Subassemblies and RF Components SUBASSEMBLY OR PART NAME WILTRON PART NUMBER Printed Circuit Board Assemblies A1, A2 Front Panel Assy D37337-51 A3 Reference Loop PCB Assy D37403-3 A4 Coarse Loop PCB Assy D37404-3...
  • Page 19 GENERAL INFORMATION PARTS LIST Table 1-4. Common Replaceable Subassemblies and Parts SUBASSEMBLY OR PART NAME WILTRON PART NUMBER Cap, Protective (for RF Output Connector) A20304 Cover, Top D37049 Cover, Bottom D37050 Cover, CPU Housing C37063 Cover, Main Card Cage D37064...
  • Page 20 GENERAL WILTRON INFORMATION SERVICE CENTERS Table 1-5. WILTRON Service Centers UNITED STATES CHINA JAPAN WILTRON COMPANY WILTRON BEIJING SERVICE ANRITSU CORPORATION 490 Jarvis Drive CENTER 1800 Onna Atsugi-shi Morgan Hill, CA 95037-2809 416W Beijing Fortune Building Kanagawa-Prf. 243 Japan Telephone: (408) 778-2000...
  • Page 21 Chapter 2 Functional Description Table of Contents INTRODUCTION ....2-3 681XXA MAJOR SUBSYSTEMS ..2-3 Digital Control .
  • Page 22 A3 REFERENCE LOOP PCB ... . 2-22 Reference Loop Oscillator ... . . 2-22 Reference Frequency Outputs ... 2-22 Oscillator Phase Locking .
  • Page 23 Step Attenuator/Relay Drivers ... 2-37 ALC Modulator Driver ....2-37 2-12 A9-1 PIN CONTROL PCB ....2-42 CPU Interface .
  • Page 24 2-15 A12 ANALOG INSTRUCTION PCB ..2-57 CPU Interface ....2-57 Frequency Band Selection ... . . 2-57 ±10V Reference Supplies .
  • Page 25 Serial Interface ....2-80 GPIB Interface ....2-80 Interrupt Control .

  • Page 26: Chapter 2 Functional Description

    Chapter 2 Functional Description INTRODUCTION This chapter provides functional descriptions of the major subsystems that are contained in each model of the sweep generator. In addition, the operation of the main circuits within each subsystem is described so that the reader may better understand the function of the subsys- tem as part of the overall operation of the 681XXA.

  • Page 27: Front Panel

    FUNCTIONAL 681XXA MAJOR DESCRIPTION SUBSYSTEMS PCB. The A16 PCB contains circuitry to perform parallel-to-serial and serial-to-parallel data conver- sion. It also contains circuitry for many of the rear panel signals, a 13-bit resolution DVM, and decoder circuitry for the front panel rotary data knob optical encoder.

  • Page 28: Analog Instruction

    FUNCTIONAL 681XXA MAJOR DESCRIPTION SUBSYSTEMS Analog The A12 Analog Instruction PCB provides the fre- Instruction quency tuning voltages to the A13 YIG Driver PCB. It supplies band select information to the A9 or A9-1 PIN Control PCB, the A13 YIG Driver PCB, and the A14 Doubler Driver PCB or A14-1 SDM Driver PCB (for models with a frequency range greater than 20 GHz).
  • Page 29 FUNCTIONAL 681XXA MAJOR DESCRIPTION SUBSYSTEMS Front Panel Rear Panel Connectors Inputs Outputs Power Input To A11 AM/FM PCB To A3 AM IN 10 MHz REF IN (Via A20 Motherboard) Reference Loop To A11 AM/FM PCB From RF Deck FM IN RF OUTPUT (Via A20 Motherboard) (Option 9K)
  • Page 30 FUNCTIONAL 681XXA MAJOR DESCRIPTION SUBSYSTEMS Serial Data Serial Data Serial Data 10 MHz REF OUT 10 MHz Real Panel BNC 10 MHz Reference Coarse Fine 500 MHz Loop Loop Loop 500 MHz 439 - 440 MHz Frequency 10 MHz REF IN Synthesis Rear Panel BNC 22 - 40 MHz...
  • Page 31 FUNCTIONAL 681XXA MAJOR DESCRIPTION SUBSYSTEMS Serial Data Serial Data Serial Data 10 MHz REF OUT 10 MHz Real Panel BNC 10 MHz Reference Coarse Fine 500 MHz Loop Loop Loop 439 - 440 MHz 500 MHz Frequency 10 MHz REF IN Synthesis Rear Panel BNC Loop...

  • Page 32: Inputs/Outputs

    FUNCTIONAL FREQUENCY DESCRIPTION SYNTHESIS Inputs/ The A21 Rear Panel PCB and the A16 CPU Inter- Outputs face PCB contain the interface circuitry for the ma- jority of the rear panel input and output connectors, including the AUX I/O connector. The front panel AM, FM, Square Wave, and External ALC inputs are routed via the A20 Motherboard PCB to the in- ternal PCBs.

  • Page 33: Overall Operation

    FUNCTIONAL FREQUENCY DESCRIPTION SYNTHESIS from the VCO then equals the reference input in phase, frequency, accuracy, and stability. In practical applications a frequency divider is placed between the output of the variable oscillator and the variable input to the phase-lock loop. The circuit can then be used to control a frequency that is an exact multiple of the reference frequency.
  • Page 34 FUNCTIONAL FREQUENCY DESCRIPTION SYNTHESIS A5 Fine Loop 10 MHz Phase A3 Reference Loop A4 Coarse Loop Error 10 MHz Frequency 211 - 391 MHz ÷ 10 ÷ 100 10 MHz REF In Synthesizer Phase/ 10 MHz 100 kHz ÷ 10 1 MHz Frequency Phase...
  • Page 35 FUNCTIONAL FREQUENCY DESCRIPTION SYNTHESIS The sweep generator’s CPU programs the coarse- loop oscillator’s output frequency so that one of its harmonics will be within 22 to 40 MHz of the de- sired YIG-tuned oscillator’s output frequency. The YIG Loop phase detector compares the YIG IF sig- nal to the 22 to 40 MHz frequency reference signal from the Fine Loop.

  • Page 36: Rf Outputs 0.01 To 40 Ghz

    FUNCTIONAL FREQUENCY DESCRIPTION SYNTHESIS RF Outputs Refer to the block diagram of the RF Deck shown in 0.01 to 40 GHz Figure 2-1 for the following description. The 681XXA uses one 2 to 20 GHz YIG-tuned oscillator. All other frequencies output by the sweep generator are derived from the fundamental frequencies gener- ated by this YIG-tuned oscillator.

  • Page 37: Alc And Modulation

    FUNCTIONAL ALC AND DESCRIPTION MODULATION swept about a center frequency. The center fre- quency is set by applying a tuning signal (also from the A12 PCB) to the YIG-tuned oscillator’s main tun- ing coil (via the A13 YIG Driver PCB). In this mode, YIG loop phase locking is disabled except during center frequency correction, which occurs during sweep retrace.
  • Page 38 FUNCTIONAL ALC AND DESCRIPTION MODULATION P/O A10 PCB P/O RF Deck External Buffer 10 - 20 GHz 0.01 - Level To Step (From Front/ 40 GHz Detector Switched Attenuator 2 - 20 GHz Rear Panel Filter RF Output A11 PCB) Buffer 2 - 20 GHz Detector 1...
  • Page 39 FUNCTIONAL ALC AND DESCRIPTION MODULATION For models containing Frequency Extension Units (FEU), modulators in the FEU control the RF power output level for the 20 to 40 GHz portion of the fre- quency range. The error correction signal from the A10 ALC PCB is fed to the modulator shaper/driver circuits located on the A14 Doubler Driver PCB.

  • Page 40: Square Wave Modulation

    FUNCTIONAL ALC AND DESCRIPTION MODULATION Power Sweep In this mode, the CPU has the ALC step the RF out- put through a range of levels specified by the user. This feature can be used in conjunction with the sweep mode to produce a set of identical frequency sweeps, each with a different RF power output level.

  • Page 41: A1 And A2 Front Panel Pcbs

    FUNCTIONAL A1 AND A2 DESCRIPTION FRONT PANEL PCBs A1 AND A2 FRONT PANEL The A1 Front Panel and A2 Front Panel Control PCBs are part of the PCBs Front Panel subsystem (Figure 2-4). These PCBs, which are mounted within the front panel casting, contain circuits that perform the follow- ing functions: Provide front panel controls for operator inputs to the CPU.
  • Page 42 FUNCTIONAL A1 AND A2 DESCRIPTION FRONT PANEL PCBs RF ON / RF OFF LEDs From FP Data Speaker Serial Internal 8-Bit Data Bus Data Latch FP Clock Parallel Converter Reverse Strobe Font Video Select Reset From Strobe FP Strobe Decoder Backlight LCD Display FP_LD...

  • Page 43: Lcd Control

    FUNCTIONAL A1 AND A2 DESCRIPTION FRONT PANEL PCBs LCD Control The front panel Liquid Crystal Display (LCD) has its own built in controller and can display 8 lines of 40 characters each. The Control line from the strobe decoder controls the data flow to the LCD controller. (When the line is set high, the data is a command to the controller;...

  • Page 44: Optical Encoder

    FUNCTIONAL A1 AND A2 DESCRIPTION FRONT PANEL PCBs regulator provides power to the line switch logic cir- cuitry. This activates the line switch relay to supply +24 volts to the OPERATE LED and the A15 Regula- tor and A18 Power Supply PCBs. Pressing the front panel LINE key deactivates the line switch relay.

  • Page 45: A3 Reference Loop Pcb

    FUNCTIONAL A3 REFERENCE DESCRIPTION LOOP PCB A3 REFERENCE LOOP The A3 Reference Loop PCB (Figure 2-5) provides the stable 10 MHz and 500 MHz reference frequency signals that are used throughout the sweep generator for phase locking. Reference The reference loop oscillator is a 100 MHz oven-con- Loop trolled crystal oscillator (OCXO) that can be tuned Oscillator...
  • Page 46 FUNCTIONAL A3 REFERENCE DESCRIPTION LOOP PCB 500 MHz, +5dBm 100 MHz (To Down OCXO RL Data Calibration Control Serial Converter) 100 MHz Signal Signal From ×5 Parallel RL Clock 500 MHz, +5dBm Converter (To A4J1 Coarse Loop) RL Strobe RL_MON (To A16 DVM) Phase 10 MHz, +3dBm...

  • Page 47: Reference Loop Monitoring

    FUNCTIONAL A3 REFERENCE DESCRIPTION LOOP PCB ences and gives top priority to the external 10 MHz reference. The phase/frequency detector compares the 10 MHz reference signal input to the 10 MHz variable signal input (from the reference loop oscillator). If there is a difference between the inputs, the detector gener- ates an error signal.

  • Page 48: A4 Coarse Loop Pcb

    FUNCTIONAL A4 COARSE DESCRIPTION LOOP PCB A4 COARSE LOOP PCB The A4 Coarse Loop PCB (Figure 2-6 on page 2-27) generates the 439 to 490 MHz coarse tuning frequency used by the YIG loop to phase lock the sweep generator. Coarse Loop The coarse loop oscillator is a voltage-controlled os- Oscillator...

  • Page 49: Oscillator Pre-Tuning

    FUNCTIONAL A4 COARSE DESCRIPTION LOOP PCB the serial interface. The 1 MHz signal output from the dividers goes to the phase/frequency detector. Oscillator The coarse loop oscillator is tuned close to the cor- Pre-Tuning rect output frequency by the pre-tune DAC, then phase locked by the phase-lock loop.
  • Page 50 FUNCTIONAL A4 COARSE DESCRIPTION LOOP PCB 500 MHz, +5 dBm from A3 Reference Loop CL Data Serial Internal From Data CL Clock Parallel Converter Latches 500 MHz CL Strobe IF Amp/ Limiter Programmable 10 - 61 MHz 10 - 61 MHz IF 439 - 490 MHz 80 MHz Frequency...

  • Page 51: Serial Interface

    FUNCTIONAL A4 COARSE DESCRIPTION LOOP PCB Serial The CPU sends tuning and divider control data to Interface the coarse loop via the A16 PCB in a 16-bit serial data word format. The serial data word is clocked into the serial-to-parallel converter by the coarse loop clock signal.

  • Page 52: A5 Fine Loop Pcb

    FUNCTIONAL A5 FINE DESCRIPTION LOOP PCB A5 FINE LOOP PCB The A5 Fine Loop PCB (Figure 2-7 on page 2-31) provides the 22 to 40 MHz fine tuning reference frequencies used by the YIG loop to phase lock the sweep generator. Fine Loop Os- The fine loop oscillator is a voltage-controlled oscilla- cillator...

  • Page 53: 10 Mhz Reference Input

    FUNCTIONAL A5 FINE DESCRIPTION LOOP PCB The frequency synthesizer contains programmable frequency dividers and a phase/frequency detector. In addition to the VCO input, it receives frequency divider programming data and a 10 MHz reference input. The CPU sends the numbers to be loaded into the frequency dividers via the serial interface.
  • Page 54 FUNCTIONAL A5 FINE DESCRIPTION LOOP PCB FL Data Serial Internal From Data FL Clock C PU Parallel Converter Latches FL Strobe Write Logic Pretune D AC Limiter 26.84 MHz 220 - 400 MHz Control VCXO 9 - 10 Error Phase/ Direct Signal MH z...

  • Page 55: Fine Loop Oscillator Pre-Tuning

    FUNCTIONAL A5 FINE DESCRIPTION LOOP PCB ters out any mixing products of the clock frequency and the output frequency. The filtered 9 to 10 MHz signal is then fed to a limiter/amplifier. The limiting action of the amplifier reduces the level of the closely spaced AM spurs that cause an apparent deg- radation of the noise floor.

  • Page 56: A6 Square Wave Generator Pcb

    FUNCTIONAL A6 SQUARE WAVE DESCRIPTION GENERATOR PCB A6 SQUARE WAVE The A6 Square Wave Generator PCB (Figure 2-8) provides the inter- GENERATOR PCB nal square wave generating function for the sweep generator. It also supplies 400 kHz to phase lock the instrument’s power supply. Generating The square wave frequencies are derived from the Square...

  • Page 57: Generating 400 Khz

    FUNCTIONAL A6 SQUARE WAVE DESCRIPTION GENERATOR PCB Generating The 10 MHz reference frequency input is fed to a ÷25 divider circuit to produce the 400 kHz signal. 400 kHz From the divider, the 400 kHz signal goes via a line driver to pin 15 of the PCB connector.

  • Page 58: A7 Yig Loop Pcb

    FUNCTIONAL A7 YIG DESCRIPTION LOOP PCB 2-10 A7 YIG LOOP PCB The A7 YIG Loop PCB (Figure 2-9) provides for fine tuning and phase locking the YIG-tuned oscillator’s output frequency to the reference frequency. This is accomplished by mixing a sample of the YIG-tuned oscillator’s output frequency with harmonics of the coarse loop fre- quency.

  • Page 59: Step Recovery Diode/Sampler

    FUNCTIONAL A7 YIG DESCRIPTION LOOP PCB Step Recov- The step recovery diode produces a very sharp im- ery Diode/ pulse signal that contains harmonic signals in the range of ≥1.9755 to approximately 20 GHz. This har- Sampler monic comb output goes to the sampler, where it is mixed with a sample of the RF output from the YIG- tuned oscillator.

  • Page 60: A9 Pin Control Pcb

    FUNCTIONAL A9 PIN DESCRIPTION CONTROL PCB 2-11 A9 PIN CONTROL PCB The A9 PIN Control PCB (Figure 2-10 on page 2-39) provides current drive signals to the PIN switches located in the switched filter and fre- quency extension units, the drive signals for the optional step attenu- ator, and the modulator control for the ALC.
  • Page 61 FUNCTIONAL A9 PIN DESCRIPTION CONTROL PCB The ALC modulator driver contains a shaper ampli- fier circuit, a FEU ALC amplifier circuit, a sam- ple/hold circuit, and square wave modulation circuitry. It is controlled by data loaded into an 8-bit data latch by strobe 0. Shaper Amplifier The ALC control signal, from the A10 ALC PCB, is fed via a buffer/amplifier to the input of the shaper...
  • Page 62 FUNCTIONAL A9 PIN DESCRIPTION CONTROL PCB Band 11A SF (2 - 3.3 GHz) Band 11B SF (3.3 - 5.5 GHz) Switched Switched Filter Band 11C SF (5.5 - 8.4 GHz) Filter Drivers D e c od e rs Band 0 SF (0.01 - 2 GHz) Control Band 011AB SF (2 - 8.4 GHz) Drivers...
  • Page 63 FUNCTIONAL A9 PIN DESCRIPTION CONTROL PCB DVM circuit on the A16 PCB for use in calibration and troubleshooting. Square Wave Modulation The square wave modulation circuitry uses square wave inputs to modulate the RF output signal. There are two sources of square wave inputs. INT SQWV–Four TTL square wave frequen- cies (400 Hz, 1 kHz, 7.8125 kHz, and 27.8 kHz) that come from the A6 Square Wave Generator...

  • Page 64: Control Pcb

    FUNCTIONAL A9 PIN DESCRIPTION CONTROL PCB In the 20 to 40 GHz range, the sample/hold signal places the FEU ALC amplifier in a HOLD mode dur- ing the periods the RF is turned off by the modulat- ing square wave. 681XXA MM 2-41...

  • Page 65: A9-1 Pin Control Pcb

    FUNCTIONAL A9-1 PIN DESCRIPTION CONTROL PCB 2-12 A9-1 PIN CONTROL PCB The A9-1 PIN Control PCB (Figure 2-11) provides current drive sig- nals to the PIN switches in the switched filter and switched doubler module units, the drive signal for the optional step attenuator, and the modulator control for the ALC.
  • Page 66 FUNCTIONAL A9-1 PIN DESCRIPTION CONTROL PCB Band 11A SF (2 - 3.3 GHz) Band 11B SF (3.3 - 5.5 GHz) Switched Band 11C SF (5.5 - 8.4 GHz) From Filter Band 0 SF (0.01 - 2 GHz) L_SEL2 Band 11AB SF (2 - 8.4 GHz) Drivers Band 12A SF (8.4 - 13.25 GHz) Band 12B SF (13.25 - 20 GHz)

  • Page 67: Alc Modulator Driver

    FUNCTIONAL A9-1 PIN DESCRIPTION CONTROL PCB The ALC modulator driver is a part of the ALC loop. Modulator It provides drive signals to the modulator, located in Driver the switched filter, to adjust the RF output level. The ALC modulator driver contains a shaper ampli- fier circuit, a sample/hold circuit, and a square wave modulation circuit.
  • Page 68 FUNCTIONAL A9-1 PIN DESCRIPTION CONTROL PCB Front Panel SQWV IN and Rear Panel SQWV IN–An external TTL square wave that comes from either the front panel or rear panel BNC input. The input is selectable from a front panel menu. The square wave input signals are multiplexed by the sample/hold multiplexer, which is controlled by data loaded into a PLD data latch.

  • Page 69: A10 Alc Pcb

    FUNCTIONAL DESCRIPTION A10 ALC PCB 2-13 A10 ALC PCB The A10 ALC PCB (Figure 2-12) controls the RF output power level functions of the 681XXA. It also provides amplitude modulation capa- bility and control of the RF during square wave modulation. It is the major component of the automatic level control (ALC) loop (described on page 2-14).
  • Page 70 FUNCTIONAL DESCRIPTION A10 ALC PCB Band 0 Thermistor Detector +10V Thermistor -10V (N/C) Band 1 AM Peak AM Meter Detector ALC_MON Detector FEU Detector Pre Amp Thermistor (To A16 MCB) (N/C) Log Amp Input Log Amp Output AM Trough ALC Out Detctor PIN MON (From A9 PCB)

  • Page 71: Amplitude Modulation

    FUNCTIONAL DESCRIPTION A10 ALC PCB Amplitude There are two AM operation modes—Linear AM Modulation and Log AM. In Linear AM mode, sensitivity is 100%/V and the 681XXA accepts a –1V to +1V input signal. In Log AM mode, sensitivity is 10 dB/V and the signal generator accepts a wider range of input signals.

  • Page 72: Detector Log Amplifier

    FUNCTIONAL DESCRIPTION A10 ALC PCB 2 GHz; Detector 1 is part of the main Directional Coupler and is for frequencies from 2 to 40 GHz. These detector signals are multiplexed by FET switches into the detector preamplifier. The pream- plifier contains separate amplifiers for the AC and DC portions of the detector signal.

  • Page 73: Level Amplifier

    FUNCTIONAL DESCRIPTION A10 ALC PCB During the ON portion of the modulating square wave, the ALC loop error signal is fed to the level amplifier to control the RF output level. During the OFF portion of the modulating square wave, the FET switch opens.

  • Page 74: Detector Thermistor Circuit

    FUNCTIONAL DESCRIPTION A10 ALC PCB Detector In the 681XXA, the CPU does not monitor the out- Thermistor put of the thermistor that is built into each internal Circuit level detector. The thermistor signal is not con- nected to the A10 PCB and the thermistor circuitry on the A10 PCB is disabled by the control signals, L_T_SEL0 and L_T_SEL1, from the ALC data latch.

  • Page 75: A11 Am/Fm Pcb

    FUNCTIONAL DESCRIPTION A11 AM/FM PCB 2-14 A11 AM/FM PCB The A11 AM/FM PCB (Figure 2-13) provides the capability for phase locking, frequency modulating (FM), and narrow-band analog sweep- ing (≤100 Hz wide) of the YIG-tuned oscillator RF output. In addition, the A11 PCB contains the input circuitry for the amplitude modulat- ing signal that goes to the A10 ALC PCB.
  • Page 76 FUNCTIONAL DESCRIPTION A11 AM/FM PCB Overl oad Detector FM Overload (To A17 PC B) Polarity 1 kHz HPF Sel ect Buf fer Rear Panel FM A m p FM Monitor FM Peak Front Panel FM 30 Hz HPF Detector Internal FM (Future Option) Wi de FM (To A13 PC B)

  • Page 77: Fm Meter Circuit

    FUNCTIONAL DESCRIPTION A11 AM/FM PCB From the filter network, the FM signal goes via a polarity select switch to a buffer amplifier. FM sig- nal polarity is selectable from a front panel menu. The FM signal from the buffer amplifier is fed to the FM Calibration DAC and the FM Meter circuit.

  • Page 78: Yig Phase-Lock

    FUNCTIONAL DESCRIPTION A11 AM/FM PCB During YIG loop phase locking, the loop error volt- Phase-Lock age from the A7 YIG Loop PCB goes to the loop am- plifier. The loop amplifier has a decreasing gain with increasing frequency characteristic. The false lock detector prevents the loop from phase locking on noise by generating a voltage that forces the YIG- tuned oscillator to a higher frequency when a false...

  • Page 79: Dvm Multiplexer

    FUNCTIONAL DESCRIPTION A11 AM/FM PCB The DVM multiplexer is used for multiplexing vari- Multiplexer ous signals from the A11 PCB to the DVM circuit on the A16 PCB. The following signals are multiplexed to the DVM for self-test, measurement, and/or cali- bration purposes: FM Meter circuit output Phase Modulation Meter circuit output...

  • Page 80: A12 Analog Instruction Pcb

    FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB 2-15 A12 ANALOG The A12 Analog Instruction PCB (Figure 2-14 on page 2-59) provides INSTRUCTION PCB frequency tuning voltages and frequency band select signals to the A13 YIG Driver PCB. For models with a frequency range greater than 20 GHz, it supplies frequency band select signals to the A14 Doubler Driver PCB or A14-1 SDM Driver PCB.

  • Page 81: Ramp Generator Circuitry

    FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB Ramp The ramp generator circuitry provides a linear ana- Generator log sweep ramp with a dwell at the top and bottom Circuitry of the ramp to allow for bandswitching and phase- locking of the oscillators for frequency correction. In addition, it establishes bandswitch points for broad- band sweeps and frequency marker placement.
  • Page 82 FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB L_DWL_OUT (To AUX I/O) DWL INT (To A16 PCB) LDF A4 LDF A1 LTD A4 +10V -10V Center Tune 1 EXT_SWP L DAC-E FREQ (To A13 PCB) (From AUX I/O) STB 7 L_DWL_IN LT < 1SEL L INT OFF (From Rear Panel) RETRACE...
  • Page 83 FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB Ramp Control Logic Ramp control logic determines when the ramp is in the sweep, retrace, or dwell mode. The dwell signal from the ramp comparator (or L_DWL_IN from the rear panel) determines the start of each dwell. All other control signals and timing are determined by the CPU.

  • Page 84: Frequency Instruction Circuitry

    FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB dwell signal is also used for this master-slave opera- tion of two 681XXAs. Frequency The frequency instruction circuitry provides the Instruction analog tuning voltages to the A13 YIG Driver PCB Circuitry in both CW and sweep modes of operation. The fre- quency instruction circuitry consists of the Center Frequency DAC, the ∆F Width DAC, and the Linear- izer DAC.
  • Page 85 FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB ∆F Width DAC The ∆F Width DAC receives a +10V to –10V ∆F ramp from the ramp generator and attenuates it ac- cording to the selected sweep width. When sweep- ing a single YIG-tuned oscillator band, such as 2–8.4 GHz, the output of the ∆F Width DAC will go from approximately –5V to +5V.

  • Page 86: Yig Offset Dac

    FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB YIG Offset YIG Offset DAC A supplies a reference voltage (OFFSET_1) for the A13 YIG Driver PCB to set the low end operating frequency of the YIG-tuned oscil- lators. It provides coarse calibration of the start fre- quency of the oscillators while the Center Frequency DAC provides fine calibration of the start frequencies.

  • Page 87: Slope Circuitry

    FUNCTIONAL A12 ANALOG DESCRIPTION INSTRUCTION PCB DACs to provide the V/GHz signal to the A21 Rear Panel PCB. For instruments with a high end fre- quency of 20 GHz or less, the output of the sum- ming amplifier is 1.0 volt per GHz; for instruments having a high end frequency of 20–40 GHz, the out- put of the summing amplifier is 0.5 volt per GHz.

  • Page 88: A13 Yig Driver Pcb

    FUNCTIONAL A13 YIG DESCRIPTION DRIVER PCB 2-16 A13 YIG DRIVER PCB The A13 YIG Driver PCB (Figure 2-15 on page 2-67) provides the tun- ing current and bias voltages for the 2 to 20 GHz YIG-tuned oscillator. It also supplies the bias voltages for the 0.01 to 2 GHz Down Con- verter and the amplifiers located in the Switched Filter.
  • Page 89 FUNCTIONAL A13 YIG DESCRIPTION DRIVER PCB TUNE_1, also from the A12 PCB, is a dc volt- age that represents the tuning current needed for the YIG-tuned oscillator (CW mode) or a 0V to –10V ramp signal (sweep mode). It goes via a buffer amplifier and an analog switch to the input of the control amplifier.
  • Page 90 FUNCTIONAL A13 YIG DESCRIPTION DRIVER PCB Control FM Tuning Coil (From A11 PCB) Drivers FM Tuning Coil Current Sense CW_FIL_1 (From A12 PCB) Filter FM Tuning OFFSET_1 Coil (From A12 PCB) Main Tuning Main Main LF_FM Coil Control Switched Tuning (From A11 PCB) Driver Filter...

  • Page 91: Bias Supplies

    FUNCTIONAL A13 YIG DESCRIPTION DRIVER PCB Bias Supplies The Band 0, Band 11, and Band 12 frequency band selection signals, from the A12 PCB, control the ap- plication of a +10V reference voltage to turn on the regulators that supply bias voltages to the YIG- tuned oscillator, the amplifiers in the switched fil- ter, and the down converter.

  • Page 92: A14 Doubler Driver Pcb

    FUNCTIONAL A14 DOUBLER DESCRIPTION DRIVER PCB 2-17 A14 DOUBLER DRIVER The A14 Doubler Driver PCB (Figure 2-16 on page 2-71) provides bias voltages and modulator drive signals for the three doubler/amplifiers located in the frequency extension unit. It also contains regulators that may be used in the future to supply bias voltages for a 40 to 60 GHz doubler/amplifier or a 2 to 20 GHz high power amplifier.

  • Page 93: Modulator Shaper

    FUNCTIONAL A14 DOUBLER DESCRIPTION DRIVER PCB 2 to 20 GHz Power Amplifier Bias When a 2 to 20 GHz high power amplifier is in- stalled in the instrument, the Band 5 signal causes the +10V reference voltage to go to the 2 to 20 GHz power amplifier bias regulators.
  • Page 94 FUNCTIONAL A14 DOUBLER DESCRIPTION DRIVER PCB +15 VG 10 Volt Reference +12V K Band (20 - 26.5 GHz) K Bias Doubler Bias Regulator +18V Band 2 +12V Ka1 Band (26.5 - 33 GHz) Band 3 Ka Bias1 Doubler Bias Regulator +18V Band 31 From...
  • Page 95 FUNCTIONAL A14 DOUBLER DESCRIPTION DRIVER PCB lators located in the Ka1 Band and Ka2 Band dou- bler/amplifier modules of the FEU. W Band Modulator Driver When a 40 to 60 GHz doubler/amplifier is installed in the instrument, the Band 4 signal causes the shaper amplifier output to go to the W Band (40 to 60 GHz) modulator driver.

  • Page 96: A14-1 Sdm Driver Pcb

    FUNCTIONAL A14-1 SDM DESCRIPTION DRIVER PCB 2-18 A14-1 SDM DRIVER PCB The A14-1 SDM Driver PCB (Figure 2-17) provides bias voltage for the doubler/amplifiers located in the Switched Doubler Module (SDM). Bias Supply The Band 2 and Band 3 frequency band selection signals, from the A12 Analog Instruction PCB, con- trol the application of a +10V reference voltage to turn on the switched doubler module bias regulator.

  • Page 97: A16 Cpu Interface Pcb

    The output signals, L_ALT_EN and L_ALT, go to the rear panel AUX I/O connector for use by the WILTRON 560A, 561, and 562 network analyz- ers in the alternate sweep mode of operation. The output signals, EOS_OUT and SWP_TRG, go to the...
  • Page 98 FUNCTIONAL A16 CPU DESCRIPTION INTERFACE PCB FP_DATA INTO_EN FP_CLK EDWL_EN FP_STRB A2 PCB Path Control FP_LD Driver Select Latch RL_DATA RL_CLK A3 PCB RL_STRB Strobe Serial CL_DATA Interface CL_CLK Drivers A4 PCB L_SEL7 CL_STRB Data Shift From Address FL_DATA Registers Decoder L_BUSY FL_CLK...

  • Page 99: Knob Decoder

    FUNCTIONAL A16 CPU DESCRIPTION INTERFACE PCB A6 Square Wave Generator PCB. There is a sepa- rate serial data bus for each PCB. Serial Output The CPU first sends address and command data to set up the serial interface for the command/data transfer to the selected PCB.

  • Page 100: Dvm

    FUNCTIONAL A16 CPU DESCRIPTION INTERFACE PCB The digital voltmeter (DVM) reads voltages from 16-channels for use in self test, calibration, and monitoring various functions of the sweep gener- ator, such as %AM and FM deviation. The digital voltmeter is a 13-bit DVM with auto-polarity. It has a full scale range of ±10V and a conversion time of less than 30 µs.

  • Page 101: A17 Cpu Pcb

    FUNCTIONAL DESCRIPTION A17 CPU PCB 2-20 A17 CPU PCB The A17 CPU PCB (Figure 2-19) directly or indirectly controls all the main functions of the 681XXA. It contains the microprocessor and its supporting circuitry, CPU memory, address and data busses, a serial port interface, a parallel port interface, and a GPIB interface.
  • Page 102 FUNCTIONAL DESCRIPTION A17 CPU PCB Internal Address Bus (A01 - A23) A0 1 Add r ess To A9, A10 A 0 2 Bu s All, A12, 16 MHz A0 3 Clo ck L at ch And A16 PC Bs Circuit A0 4 L_SEL 0 N ON - VO L...

  • Page 103: Parallel Interface/Timer

    FUNCTIONAL DESCRIPTION A17 CPU PCB data bus, D0-D15. This allows bi-directional trans- fer of data between the CPU and the A9, A10, A11, A12, and A16 PCBs under the control of the micro- processor. Parallel The parallel interface port is used by the microproc- Interface/ essor to monitor the status of various operations Timer...

  • Page 104: Interrupt Control

    FUNCTIONAL DESCRIPTION A17 CPU PCB Interrupt In addition to processing on-board interrupts from Control the timer, serial interface, and GPIB controller cir- cuits, the interrupt control logic circuit also proc- esses the interrupt signals received from the A10 and A16 PCBs. The interrupts from the A10 and A16 PCBs are de- scribed as follows: The L_GPINT0 interrupt signal from the A16...

  • Page 105: A15, A18, & A19 Power Supply Pcbs

    FUNCTIONAL A15, A18, & A19 DESCRIPTION POWER SUPPLY PCBs 2-21 A15, A18, & A19 POWER The A15 Regulator PCB, A18 Power Supply PCB, and A19 AC Line SUPPLY PCBs Conditioner PCB, and part of the A21 Rear Panel PCB and Rear Cast- ing Assembly make up the power supply subsystem (Figure 2-20).
  • Page 106 FUNCTIONAL A15, A18, &A19 DESCRIPTION POWER SUPPLY PCBs Part of P/O A21 A19 AC Line Conditioner PCB Part of A20 Motherboard PCB Rear Casting Rear Panel +30V Standby Supply +30V RTN A18 Power Supply PCB +5 VD Rectifier +9 VLP Rectifier A15 Regulator PCB +15 VG...

  • Page 107: A18 Power Supply Pcb

    FUNCTIONAL A15, A18, & A19 DESCRIPTION POWER SUPPLY PCBs PCB. On the A15 PCB, the +30V is regulated to +24V (standby power). Switching Transistors The switching transistors are connected in a full bridge configuration and are the switching elements for the A18 Power Supply PCB. They alternately switch +165 Vdc and –165 Vdc to the primary wind- ings of the main power transformer, T4, at a 200 kHz rate.
  • Page 108 FUNCTIONAL A15, A18, & A19 DESCRIPTION POWER SUPPLY PCBs In addition, the detector also supplies a signal that (1) goes to the CPU as PS_LOCK to indicate power supply phase lock and (2) causes an onboard LED to light when the PWM is phase locked. 5V Error Amplifier The +5V output from the +5V rectifier/filter circuit goes to the 5V error amplifier.

  • Page 109: A15 Regulator Pcb

    FUNCTIONAL A15, A18, & A19 DESCRIPTION POWER SUPPLY PCBs Rectifier/Filter Circuits The reduced voltages from the secondary windings of T4 are rectified and filtered by full wave rectifiers and dual inductor/capacitor filter networks. The ±18 VG, +28 VG, –21 VT, and –50 VT output volt- ages are routed via the A20 Motherboard PCB to the A15 Regulator PCB.
  • Page 110 FUNCTIONAL A15, A18, & A19 DESCRIPTION POWER SUPPLY PCBs standby power supply. It gets its input voltage from the +28 VG unregulated supply on the A18 PCB. The output of this supply is designated as +24 VH. +15V and –15V Power Supplies The +18 VG and –18 VG voltages from the A18 PCB are reduced and regulated by the +15V and –15V regulators to produce the power supply outputs des-...
  • Page 111 FUNCTIONAL A15, A18, & A19 DESCRIPTION POWER SUPPLY PCBs Out of Regulation Circuit The out of regulation circuit monitors all of the regu- lated power supply outputs. If any of the regulators has no output, the circuit will generate the signal, L_OUTREG.

  • Page 112: Rf Deck Assemblies

    FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES 2-22 RF DECK ASSEMBLIES The primary purpose of the RF deck assembly is to generate CW and swept frequency RF signals and route these signals to the front panel RF OUTPUT connector. It is capable of generating RF signals in the frequency range of 0.01 to 40 GHz.
  • Page 113 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES YIG-tuned Oscillator The 2 to 20 GHz YIG-tuned oscillator actually con- tains two oscillators—one covering the frequency range of 2 to 8.4 GHz and one covering the fre- quency range of 8.4 to 20 GHz. Both oscillators use a common internal amplifier.
  • Page 114 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES via connector J5 to the Sampler for use by the YIG loop circuitry. The modulator control input provides a signal to the modulator to control the power level of the RF out- put signals. This modulator control signal is re- ceived from the A9 PIN Control PCB, where it is derived from the A10 PCB’s ALC control signal in- put.

  • Page 115: Below 320001

    FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES RF Decks for The RF deck assemblies for models 68137A, Models Hav- 68147A, 68163A, and 68169A having serial num- ing Serial bers below 320001 are described in the following Numbers paragraphs. Refer to the block diagrams in Figures Below 320001 2-21 and 2-22 during the following descriptions.
  • Page 116 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES NOTE Down Converter Assy not installed in Model 68137A Figure 2-21. Block Diagram of the RF Deck Assembly for Models 68137A and 68147A with serial numbers below 320001. 681XXA MM 2-93...
  • Page 117 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES NOTE Down Converter Assy not installed in Model 68163A Figure 2-22. Block Diagram of the RF Deck Assembly for Models 68163A and 68169A with serial numbers below 320001. 2-94 681XXA MM...
  • Page 118 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES Down Converter The 0.01 to 2 GHz Down Converter, found in models 68147A and 68169A, contains a 6 GHz VCO that is phase-locked to the 500 MHz reference signal from the A3 Reference Loop PCB. The 6 GHz VCO’s phase-lock condition is monitored by the CPU.
  • Page 119 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES RF signal input to the FEU is detected and coupled out to the FEU ALC modulator driver circuit on the A9 PCB. The resulting modulator control signal goes to the modulator in the switched filter assem- bly to adjust the power level of the RF input to the FEU.

  • Page 120: Rf Decks For Models With Serial Number 32001

    FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES sulting modulator control signal goes to the modula- tor in the switched filter assembly to adjust the RF output power level. RF Decks for The RF deck assemblies for models 68137A, Models with 68147A, 68163A, and 68169A having serial number Serial Num- 320001 and above are described in the following ber 32001...
  • Page 121 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES From J2, the RF signal goes via a 20 GHz low-pass filter to either the directional coupler (models 68137A and 68147A) or the input connector J1 on the switched doubler module (models 68163A and 68169A). Down Converter The 0.01 to 2 GHz Down Converter, found in models 68147A and 68169A, contains a 6.5 GHz VCO that...
  • Page 122 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES RF Path for 20 GHz Models Switched Doubler Module - D24870 2-20 GHz Switched Filter Assy. - D26932 (Standard) (40 GHz Models) YIG Oscillator - D26340 (Option 15) 20 - 25 GHz BPF 3.3 GHz LPF Directional 110 dB RF Output...
  • Page 123 FUNCTIONAL RF DECK DESCRIPTION ASSEMBLIES plied by the A14-1 SDM Driver PCB. The RF signal is amplified, then doubled in frequency. From the doubler, the 20 to 40 GHz RF signal is routed by PIN switches to the bandpass filters. There are three bandpass filter paths to provide good har- monic performance.
  • Page 124 Chapter 3 Performance Verification Table of Contents INTRODUCTION ....3-3 RECOMMENDED TEST EQUIPMENT ..3-3 TEST RECORDS ....3-3 CONNECTOR AND KEY LABEL NOTATION .
  • Page 125 3-10 POWER LEVEL TESTS ....3-22 Test Setup ..... . 3-22 Power Level Accuracy Test Procedure .

  • Page 126: Chapter 3 Performance Verification

    In some cases, the user may substitute test equipment having the same critical specifications as those on the recommended test equipment list. Contact your local WILTRON service center (refer to Table 1-5 on page 1-15) if you need clarification of any equipment or procedural reference. TEST RECORDS A blank copy of a sample performance verification test record for each 681XXA model is provided in Appendix A.
  • Page 127 Adapts the Power Sensor, HP 8487A, to Part Number: HP 11904D the 681XXA RF OUTPUT connector Frequency Range: DC to 40 GHz Attenuator WILTRON, Model 41KC-10 3-8, 3-9 Max Input Power: .+17 dBm Attenuation: 10 dB Frequency Range: DC to 40 GHz...
  • Page 128 PERFORMANCE INTERNAL TIME BASE VERIFICATION AGING RATE TEST INTERNAL TIME BASE The following test can be used to verify that the 681XXA 10 MHz time AGING RATE TEST base is within its aging specification. The 681XXA derives its frequency accuracy from an internal 100 MHz crystal oscillator standard. (With Option 16 installed, frequency accuracy is derived from an internal high-stability 10 MHz crystal oscillator.) An inherent characteristic of crystal oscillators is the effect of crystal aging within the first few days...

  • Page 129: Test Setup

    PERFORMANCE INTERNAL TIME BASE VERIFICATION AGING RATE TEST Test Setup Connect the equipment, shown in Figure 3-1, as fol- lows: 1. Connect the 681XXA rear panel 10 MHz REF OUT to the Oscilloscope vertical input. 2. Connect the output of the Frequency Standard –10 (having a long term stability of ≤1x10 ) to the...

  • Page 130: Example

    PERFORMANCE INTERNAL TIME BASE VERIFICATION AGING RATE TEST 6. Calculate the aging rate using the following for- mula (refer to the example at the end of the proce- dure):         1 cycle SPEC Aging Rate = −...

  • Page 131: Frequency Synthesis Tests

    PERFORMANCE FREQUENCY VERIFICATION SYNTHESIS TESTS FREQUENCY The following tests can be used to verify correct operation of the fre- SYNTHESIS TESTS quency synthesis circuits. Frequency synthesis testing is divided into two parts—coarse loop/YIG loop tests and fine loop tests. 681XXA SWEEP GENERATOR FREQUENCY COUNTER 10 MHz Band 3...

  • Page 132: Coarse Loop/Yig Loop Test Procedure

    PERFORMANCE FREQUENCY VERIFICATION SYNTHESIS TESTS Coarse Loop/ The following procedure tests both the coarse loop YIG Loop Test and YIG loop by stepping the sweep generator Procedure through its full frequency range in 1 GHz steps and measuring the RF output at each step. 1.

  • Page 133: Fine Loop Test Procedure

    PERFORMANCE FREQUENCY VERIFICATION SYNTHESIS TESTS Fine Loop The following procedure tests the fine loop by step- Test ping the instrument through ten 1 kHz steps (ten Procedure 100 Hz steps for instruments with Option 11) and measuring the RF output at each step. 1.

  • Page 134: Spurious Signals Test: Rf Output Signals ≤2 Ghz

    PERFORMANCE SPURIOUS SIGNALS TEST: RF OUTPUT SIGNALS ≤2 GHz VERIFICATION SPURIOUS SIGNALS The following test can be used to verify that the sweep generator meets TEST: RF OUTPUT its 0.01 to 2 GHz spurious signals (harmonic and non-harmonic) specifi- SIGNALS ≤ 2 GHz cations.
  • Page 135 PERFORMANCE SPURIOUS SIGNALS TEST: RF OUTPUT SIGNALS ≤2 GHz VERIFICATION 2. Set up the 681XXA as follows: a. Reset the instrument by pressing SYSTEM Table 3-2. Maximum Leveled Output Power then Reset . Upon reset the CW Menu is dis- Model Output Power played.
  • Page 136 PERFORMANCE SPURIOUS SIGNALS TEST: RF OUTPUT SIGNALS ≤2 GHz VERIFICATION 9. Set F1 to 1.6 GHz. Measure the worst case non- harmonic signal for the 1.6 GHz carrier and re- cord its presence by entering its level on the Test Record.

  • Page 137: Harmonic Test: Rf Output Signals From 2 To 20 Ghz

    PERFORMANCE HARMONIC TEST: RF OUTPUT VERIFICATION SIGNALS FROM 2 TO 20 GHz HARMONIC TEST: RF The following test can be used to verify that the sweep generator meets OUTPUT SIGNALS its harmonic specifications for RF output signals from 2 to 20 GHz. FROM 2 TO 20 GHz Test record entries are supplied for harmonics up to a frequency limit of 40 GHz.

  • Page 138: Test Procedure (2 To 10 Ghz)

    PERFORMANCE HARMONIC TEST: RF OUTPUT VERIFICATION SIGNALS FROM 2 TO 20 GHz Test The following procedure lets you measure the 2 to Procedure 10 GHz RF output harmonic levels to verify that (2 to 10 GHz) they meet specifications. 1. Set up the 681XXA as follows: a.Reset the instrument by pressing SYSTEM Table 3-4.

  • Page 139: Test Procedure (11 To 20 Ghz)

    Set L1 to –30 dBm output power. NOTE If the 681XXA is not fitted with Option 2, install a 30 dB attenuator (Wiltron 41KC-20 and 41KC-10) and set L1 to 0.0 dBm output power. 2. Set up the Spectrum Analyzer as follows: a.
  • Page 140 PERFORMANCE HARMONIC TEST: RF OUTPUT VERIFICATION SIGNALS FROM 2 TO 20 GHz 4. Remove Connection A and connect the 681XXA RF OUTPUT to the waveguide mixer input of the Spectrum Analyzer as shown in Connection B. 5. On the 681XXA, remove 30 dB of attenuation from the RF output.

  • Page 141: Single Sideband Phase Noise Test

    PERFORMANCE SINGLE SIDEBAND VERIFICATION PHASE NOISE TEST SINGLE SIDEBAND The following test can be used to verify that the sweep generator meets PHASE NOISE TEST its single sideband phase noise specifications. For this test, a second 681XXA is required. This additional sweep generator acts as a local os- cillator (LO).

  • Page 142: Test Procedure

    PERFORMANCE SINGLE SIDEBAND VERIFICATION PHASE NOISE TEST Test The following procedure lets you measure the RF Procedure output single sideband phase noise levels to verify that they meet specifications. NOTE The following technique is a measurement of phase noise and AM noise. To avoid erro- neous results, on the 681XXA DUT set L1 for maximum leveled output power and se- lect External Detector leveling.
  • Page 143 PERFORMANCE SINGLE SIDEBAND VERIFICATION PHASE NOISE TEST 3. Set up the Spectrum Analyzer as follows: a. Center Frequency: 1 MHz b. Frequency Span: 300 Hz c. RBW: 3 Hz d. Position the Marker to the peak of the signal. e. Select OFFSET, ENTER OFFSET, and MKRCF. f.
  • Page 144 PERFORMANCE SINGLE SIDEBAND VERIFICATION PHASE NOISE TEST 9. On the Spectrum Analyzer: a. Deselect NOISE LVL. b. Set Frequency Span to 300 kHz. c. Adjust the Marker for a 100 kHz offset. d. Select NOISE LVL. 10. Measure the phase noise level 100 kHz offset from the carrier frequency.

  • Page 145: Power Meter

    PERFORMANCE POWER LEVEL ACCURACY VERIFICATION AND FLATNESS TESTS 3-10 POWER LEVEL The following tests can be used to verify that the 681XXA meets its ACCURACY AND power level specifications. Power level verification testing is divided FLATNESS TESTS into two parts—power level accuracy tests and power level flatness tests.
  • Page 146 PERFORMANCE POWER LEVEL ACCURACY VERIFICATION AND FLATNESS TESTS Power Level The following procedure tests power level accuracy Accuracy by stepping the output power level down in 1 dB in- Test crements from its maximum rated power level and Procedure measuring the output power level at each step. 1.
  • Page 147 PERFORMANCE POWER LEVEL ACCURACY VERIFICATION AND FLATNESS TESTS Power Level The following procedure tests power level flatness by Flatness Test measuring the output power level variation during a Procedure full band sweep; first in the step sweep mode, then in the analog sweep mode. 1.
  • Page 148 PERFORMANCE POWER LEVEL ACCURACY VERIFICATION AND FLATNESS TESTS 3. Set up the 681XXA as follows for an analog sweep power level flatness test: a. Reset the instrument by pressing SYSTEM then Reset . The CW Menu is displayed. b. Press Analog to place the 681XXA in the ana- log sweep frequency mode and display the Ana- log Sweep Menu.
  • Page 149 Chapter 4 Calibration Table of Contents INTRODUCTION ....4-3 RECOMMENDED TEST EQUIPMENT ..4-3 TEST RECORDS ....4-3 CALIBRATION FOLLOWING SUBASSEMBLY REPLACEMENT .
  • Page 150 4-11 AM BANDWIDTH CALIBRATION ..4-27 Equipment Setup ....4-27 AM Bandwidth Adjustment ... . 4-28 Entering DAC Settings .

  • Page 151: Chapter 4 Calibration

    In some cases, the user may substitute test equipment having the same critical specifications as those on the recommended test equip- ment list. Contact your local WILTRON service center (Refer to Table 1-5 on page 1-15) if you need clarification of any equipment or procedural reference. TEST RECORDS A blank copy of a sample calibration test record for each 681XXA model is provided in Appendix A.
  • Page 152 CALIBRATION FOLLOWING CALIBRATION SUBASSEMBLY REPLACEMENT CALIBRATION Table 4-2 (page 4-6) lists the calibration that should be performed fol- FOLLOWING lowing the replacement of 681XXA subassemblies or RF components. SUBASSEMBLY REPLACEMENT CONNECTOR AND KEY The calibration procedures include many references to equipment inter- LABEL NOTATION connections and control settings.

  • Page 153: Recommended Test Equipment

    AM Depth: 0% to 90% AM Modulation Rates: DC to 100 kHz Filters: 50 Hz lowpass, 15 kHz highpass Scalar Network Frequency Range: 0.01 to 40 GHz WILTRON Model 562, with 4-8, 4-9 Analyzer, with RF Detector: RF Detector 560-7K50 (0.01 to 40 GHz)

  • Page 154: Calibration Following Subassembly Replacement

    CALIBRATION FOLLOWING CALIBRATION SUBASSEMBLY REPLACEMENT Table 4-2. Calibration Following Subassembly/RF Component Replacement Perform the Following Subassembly/RF Component Replaced Calibration(s) in Paragraph(s): A1, A2 Front Panel Assy None A3 Reference Loop PCB A4 Coarse Loop PCB A5 Fine Loop PCB A6 Square Wave Generator PCB None A7 YIG Loop PCB None...

  • Page 155: Initial Setup

    Term 681XXA Figure 4-1. PC to 681XXA Interconnection for Calibration Interconnec- Using the WILTRON P/N T1678 serial interface as- tion sembly, connect the PC to the 681XXA as follows: 1. Connect the wide flat cable between the 681XXA rear panel SERIAL I/O connector and the P1 con- nector on the T1678 serial interface PCB.

  • Page 156: Configuring The Pc

    CALIBRATION INITIAL SETUP Configuring Configure the PC to interface with the 681XXA as fol- the PC lows: 1. Power up the 681XXA. 2. Power up the PC and place in Windows. 3. Double click on the Terminal Icon to bring up the Terminal (Untitled) window.
  • Page 157 CALIBRATION INITIAL SETUP 5. Click on Communications. 6. At the Communications Dialog box, select the fol- lowing options: Baud Rate 9600 Data Bits Stop Bits Parity None Flow Control Xon/Xoff Connector Select connection made during interconnection 681XXA MM...
  • Page 158 CALIBRATION INITIAL SETUP 7. After making the selections, click on the OK but- ton. 8. Press <ENTER> on the keyboard. 9. Verify that a prompt appears on the PC display. 10. This completes the initial setup for calibration. 4-10 681XXA MM...

  • Page 159: Preliminary Calibration

    PRELIMINARY CALIBRATION CALIBRATION PRELIMINARY This procedure provides the steps necessary to initially calibrate the CALIBRATION coarse loop, fine loop, frequency instruction, and internal DVM cir- cuitry and the 100 MHz reference oscillator of the 681XXA sweep gen- erator. Figure 4-2. Equipment Setup for Preliminary Calibration Equipment Connect the equipment, shown in Figure 4-2, as fol- Setup...

  • Page 160: Resetting The Linearizer Dacs

    PRELIMINARY CALIBRATION CALIBRATION Resetting the Before actual calibration of the 681XXA can begin, Linearizer the 2 to 8.4 GHz and 8.4 to 20 GHz settings of the DACs YIG Frequency Linearizer DACs must first be reset. 1. Reset the Linearizer DACs as follows: drct_cal a.
  • Page 161 PRELIMINARY CALIBRATION CALIBRATION 3. Calibrate the Fine Loop Pretune DAC as follows: calterm 136 a. At the prompt, type: press <ENTER>. (The prompt will appear on the screen when the calibration is complete.) b. Record step completion on the Test Record. 4.
  • Page 162 PRELIMINARY CALIBRATION CALIBRATION 7. Calibrate the YIG Frequency Linearizer DACs as follows: a. At the prompt, type: calterm 127 press <ENTER>. b. Follow the instructions on the screen and enter the value of the frequency counter reading at approximately 2 GHz. c.
  • Page 163 PRELIMINARY CALIBRATION CALIBRATION 10. Calibrate the Sweep Width DAC as follows: calterm 133 a. At the prompt, type: press <ENTER>. (This calibration can take ap- proximately 2 minutes to complete.) prompt will appear on the screen when the calibration is complete. b.
  • Page 164 SWITCHED FILTER CALIBRATION SHAPER CALIBRATION SWITCHED FILTER This procedure provides the steps necessary to adjust the Switched Fil- SHAPER CALIBRATION ter Shaper Amplifier gain to produce a more constant level amplifier gain with power level changes. Figure 4-3. Equipment Setup for Switched Filter Shaper Calibration Equipment Connect the equipment, shown in Figure 4-3, as fol- Setup...
  • Page 165 SWITCHED FILTER CALIBRATION SHAPER CALIBRATION Minimum Before the Switched Filter Shaper Amplifier can be Unleveled adjusted, the frequency at which the minimum un- Power Point leveled power point in each frequency band occurs Measurement must be determined. 1. Set up the 562 Network Analyzer as follows: a.

  • Page 166: Switched Filter Shaper Calibration

    SWITCHED FILTER CALIBRATION SHAPER CALIBRATION Shaper DAC The following procedure lets you adjust the Switched Adjustment Filter Shaper DAC which controls the gain of the Switched Filter Shaper Amplifier. 1. On the 562 Network Analyzer: a. Press SYSTEM MENU. b. On the System Menu display, highlight SYS- TEM INTERFACE, then press SELECT.
  • Page 167 SWITCHED FILTER CALIBRATION SHAPER CALIBRATION Straighten out Figure 4-4. Typical Switched Filter Shaper Calibration Waveform 3. On the 562 Network Analyzer: a. Press OFFSET/RESOLUTION. b. Set Resolution to 5 dB/Div c. Adjust Offset to center the display. 4. Adjust the Switched Filter Shaper DAC for fre- quency bands between 0.01 and 20 GHz as follows: a.
  • Page 168 SWITCHED FILTER CALIBRATION SHAPER CALIBRATION 6. Repeat steps 2 thru 5 for each frequency band listed on the Test Record. 7. Exit the program by pressing Q on the keyboard. NOTE The following procedure applies only to in- struments with frequency ranges to 40 GHz and containing FEUs (Models 68163A and 68169A having serial numbers below 320001).

  • Page 169: Entering Dac Settings

    SWITCHED FILTER CALIBRATION SHAPER CALIBRATION Entering The following procedure provides steps for entering DAC Settings the new DAC setting values into RAM located on the A17 CPU PCB. 1. Enter the new DAC setting values as follows: drct_cal a. At the prompt, type: and press <ENTER>.
  • Page 170 ALC SLOPE CALIBRATION CALIBRATION ALC SLOPE This procedure provides the steps necessary to perform ALC Slope cali- CALIBRATION bration. The ALC Slope DAC is calibrated to adjust for an increasing or decreasing output power-vs-output frequency in the analog sweep mode. The ALC Slope DAC has two calibrations—one for frequencies ≤2 GHz and one for frequencies >2 GHz.

  • Page 171: Alc Slope Calibration

    ALC SLOPE CALIBRATION CALIBRATION NOTE Before beginning this calibration procedure, always let the 681XXA warm up for a mini- mum of one hour. ALC Slope The following procedure lets you adjust the ALC Slope DAC to compensate for decreasing output power-vs-frequency for frequencies ≤2 GHz and for Adjustment frequencies >2 GHz.
  • Page 172 ALC SLOPE CALIBRATION CALIBRATION 3. Make the following selections on the 562 Network Analyzer to normalize the step sweep. a. Press CALIBRATION and follow the menu on the display. b. Press AUTOSCALE. c. Press OFFSET/RESOLUTION and set the Resolution to 0.2 dB. 4.
  • Page 173 ALC SLOPE CALIBRATION CALIBRATION 7. Make the following selections on the 562 Network Analyzer to normalize the step sweep. a. Press CALIBRATION and follow the menu on the display. b. Press AUTOSCALE. c. Press OFFSET/RESOLUTION and set the Resolution to 0.2 dB. 8.

  • Page 174: Rf Level Calibration

    2300-104. This calibration program warrants level ac- curacy specifications from maximum power to –70 dBm. For calibra- tion below –70 dBm, the 681XXA must be returned to your WILTRON service center for calibration. The RF level calibration software comes on a 3.5-inch/ 1.44 Mbyte, MS-DOS formatted floppy disk.

  • Page 175: Am Bandwidth Calibration

    AM BANDWIDTH CALIBRATION CALIBRATION 4-11 AM BANDWIDTH This procedure provides the steps necessary to perform AM Bandwidth CALIBRATION calibration. The AM Bandwidth is adjusted to compensate for gain vari- ations of the modulator. The adjustment is performed for each fre- quency band.

  • Page 176: Am Bandwidth Adjustment

    AM BANDWIDTH CALIBRATION CALIBRATION The following procedure lets you adjust the AM band- Bandwidth width to compensate for gain variations of the modu- Adjustment lator throughout the instrument’s frequency range . 1. Set up the Spectrum Analyzer as follows: a. Press the INSTR PRESET key. b.

  • Page 177: Entering Dac Settings

    AM BANDWIDTH CALIBRATION CALIBRATION 4. On the 681XXA: a. Press Edit F1 and set F1 to the start fre- quency of the first frequency band shown on the Test Record. b. Increment F1 in 100 MHz steps from the start frequency to locate the minimum bandwidth point.

  • Page 178: Storing Dac Settings

    AM BANDWIDTH CALIBRATION CALIBRATION b. Select the item that pertains to the DAC set- ting to be updated. Following the instructions presented on the bottom of the screen, enter the new DAC setting value from the Test Re- cord. c. When you are finished entering all the new DAC setting values from the Test Record, exit the program.

  • Page 179: Am Calibration

    CALIBRATION CALIBRATIION 4-12 AM CALIBRATION This procedure provides the steps necessary to perform AM calibration. The AM Calibration DAC is calibrated for input sensitivities of 100%/V (linear mode) and 10 dB/V (logarithmic mode) for frequencies ≤2 GHz and >2 GHz. Figure 4-7.

  • Page 180: Am Calibration Dac Adjustment

    CALIBRATION CALIBRATIION 4. Connect the IF Output of the Spectrum Analyzer to the RF Input of the Modulation Analyzer. 5. Connect the 681XXA RF OUTPUT to the Spectrum Analyzer RF Input. NOTE Before beginning this calibration procedure, always let the 681XXA warm up for a mini- mum of one hour.
  • Page 181 CALIBRATION CALIBRATIION f. Record step completion on the Test Record. 3. Perform Log AM calibration as follows: a. At the prompt, type: calterm 113 press <ENTER>. NOTE For instruments that do not contain a Down Converter (Models 68137A and 68163A) skip to step 2.

  • Page 182: Fm Calibration

    CALIBRATION CALIBRATIION 4-13 FM CALIBRATION This procedure provides the steps necessary to perform FM calibration. FM calibration consists of calibrating the FM Meter circuit and adjust- ing the FM Calibration DAC for input sensitivities of 20 MHz/V, 10 MHz/V, and –6 MHz/V in both narrow and wide FM modes. Figure 4-8.
  • Page 183 CALIBRATION CALIBRATIION NOTE Before beginning this calibration procedure, always let the 681XXA warm up for a mini- mum of one hour. The following procedure lets you calibrate the FM Calibration Meter circuit, adjust the FM Calibration DAC in Procedure both narrow and wide modes, and store the results in non-volatile memory (EEPROMs) on the A17 CPU PCB.
  • Page 184 CALIBRATION CALIBRATIION 4. Perform FM Narrow Sensitivity calibration as fol- lows: a. At the prompt, type: calterm 125 press <ENTER>. b. Follow the instructions on the screen. Use a 0.5 Hz square wave with an amplitude of 1 volt peak. c.
  • Page 185 Chapter 5 Troubleshooting Table of Contents INTRODUCTION ....5-3 RECOMMENDED TEST EQUIPMENT ..5-3 ERROR AND WARNING/STATUS MESSAGES . . 5-3 Self-Test Error Messages .
  • Page 186 The majority of the troubleshooting procedures presented in this chapter require the removal of the instrument covers to gain access to test points on printed circuit boards and other subassemblies. WARNING Hazardous voltages are present inside the 681XXA whenever ac line power is connected. Turn off the instrument and re- move the line cord before removing any covers or panels.

  • Page 187: Chapter 5 Troubleshooting

    Chapter 5 Troubleshooting INTRODUCTION This chapter provides information for troubleshooting sweep generator malfunctions. The troubleshooting procedures presented in this chap- ter support fault isolation to a replaceable subassembly or RF compo- nent. (Remove and replace procedures for the subassemblies and RF components are found in Chapter 6.) RECOMMENDED TEST The recommended test equipment for the troubleshooting procedures...

  • Page 188: Self-Test Error Messages

    SELF-TEST TROUBLESHOOTING ERROR MESSAGES Table 5-1. Self-Test Error Messages (1 of 3) Troubleshooting Page Error Message Table Number Error 100 5-13 DVM Ground Offset Failed Error 101 5-13 DVM Positive 10V Reference Error 102 5-13 DVM Negative 10V Reference Error 105 5-14 Power Supply Voltage(s) out of Regulation...
  • Page 189 SELF-TEST TROUBLESHOOTING ERROR MESSAGES Table 5-1. Self-Test Error Messages (2 of 3) Troubleshooting Page Error Message Table Number Error 120 5-16 5-31 Delta-F Circuits Failed Error 121 5-17 5-32 Unleveled Indicator Failed Error 122 5-17 5-32 Level Reference Failed Error 123 5-17 5-32 Detector Log Amp Failed...
  • Page 190 SELF-TEST TROUBLESHOOTING ERROR MESSAGES Table 5-1. Self-Test Error Messages (3 of 3) Troubleshooting Page Error Message Table Number Error 144 5-26 5-48 RF was Off when Selftest started. Some tests were not performed. 681XXA Models with FEU Error 136 5-22 5-42 26.5 –...

  • Page 191: Normal Operation Error And Warning/Status

    ERROR AND WARNING/ TROUBLESHOOTING STATUS MESSAGES Normal When an abnormal condition is detected during op- Operation eration, the 681XXA displays an error message to in- Error and dicate that the output is abnormal or that a signal Warning/ input or data entry is invalid. It also displays warn- Status ing messages to alert the operator to conditions that Messages...
  • Page 192 ERROR AND WARNING/ TROUBLESHOOTING STATUS MESSAGES Table 5-3. Possible Warning/Status Messages during Normal Operation Warning/Status Description Message This warning message indicates that the 100 MHz OVN COLD Crystal oven (or the 10 MHz Crystal oven if Option 16 is installed) has not reached operating temperature. Normally displayed during a cold start of the sweep generator.

  • Page 193: Malfunctions Not Displaying An Error Message

    MALFUNCTIONS NOT DISPLAYING TROUBLESHOOTING AN ERROR MESSAGE MALFUNCTIONS NOT The 681XXA must be operating to run self-test. Therefore, malfunc- DISPLAYING AN ERROR tions that cause the instrument to be non-operational do not produce MESSAGE error messages. These problems generally are a failure of the 681XXA to power up properly.

  • Page 194: Test Point Locations

    CONNECTOR AND TROUBLESHOOTING TEST POINT LOCATIONS A21-1 Rear Panel BNC/AUX I/O Connector PCB Line Filter/ Rectifier PCB Fan Assy. A21P2 A19 Power Conditioner PCB A18 Power Supply PCB 2-20 GHz A17 CPU PCB YIG Oscillator A16 CPU Interface PCB Switched Regulator PCB Filter Assy.

  • Page 195: Troubleshooting Tables

    TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-4. Malfunctions Not Displaying an Error Message (1 of 2) Sweep Generator Will Not Turn On (OPERATE light is OFF) Normal Operation: When the 681XXA is connected to the power source, the OPERATE light should illuminate and the instrument should power up.
  • Page 196 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-4. Malfunctions Not Displaying an Error Message (2 of 2) If the voltage is correct, the Front Panel assembly or the cable between Motherboard connector A20J2 and the Front Panel assembly may be defective. If the voltage is incorrect, the +24V standby power supply may be loaded down by (1) a shorted oven heater for the 100 MHz reference oscillator located on the A3 PCB, (2) a shorted heater for the optional 10 MHz high stability time...
  • Page 197 Replace the A16 PCB, then run self-test. If no error message is displayed, the problem is cleared. If any of the error messages, 100, 101, and 102, are dis- played, contact your local WILTRON service center for as- sistance. 681XXA MM...

  • Page 198: Power Supply Tests

    TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-6. Error Messages 105 and 106 (1 of 10) Power Supply Tests WARNING Voltages hazardous to life are present throughout the power supply circuits, even when the front panel LINE switch is in the STANDBY postion. When performing maintenance, use utmost care to avoid electrical shock.
  • Page 199 If the voltages are still incorrect, contact your local WILTRON service center for assistance. Step 3. Run self-test again. If no error message is displayed, the problem is cleared. If error 105 displays again, contact your local WILTRON service center for assistance. 681XXA MM 5-15...
  • Page 200 ±15VG voltages. If the voltages are correct, go to step j. If the voltages are still incorrect, contact your local WILTRON service center for assistance. Place the LINE switch to STANDBY, then install one of the removed PCBs/assemblies. k. Place the LINE switch to OPERATE and measure the ±15VG voltages.
  • Page 201 ±15VA voltages. If the voltages are correct, go to step g. If the voltages are still incorrect, contact your local WILTRON service center for assistance. g. Place the LINE switch to STANDBY, then install one of the removed PCBs/assemblies. h. Place the LINE switch to OPERATE and measure the ±15VA voltages.
  • Page 202 ±15VLP voltages. If the voltages are correct, go to step g. If the voltages are still incorrect, contact your local WILTRON service center for assistance. g. Place the LINE switch to STANDBY, then install one of the removed PCBs/assemblies. h. Place the LINE switch to OPERATE and measure the ±15VLP voltages.
  • Page 203 Remove the A13 PCB. Place the LINE switch to OPERATE and measure the ±15VLP voltages. If the voltages are correct, replace the A13 PCB. If the voltages are still incorrect, contact your local WILTRON service center for assistance. 681XXA MM 5-19...
  • Page 204 –18VT voltage. If the voltage is correct, go to step g. If the voltage is still incorrect, contact your local WILTRON service center for assistance. g. Place the LINE switch to STANDBY. h. Install the A13 PCB. Place the LINE switch to OPERATE and measure the –18VT voltage.
  • Page 205 –43VT voltage. If the voltage is correct, go to step i. If the voltage is still incorrect, contact your local WILTRON service center for assistance. Place the LINE switch to STANDBY. Install the A13 PCB. k. Place the LINE switch to OPERATE and measure the –43VT voltage.
  • Page 206 If the voltage is correct, go to step g. If the voltage is still incorrect, contact your local WILTRON service center for assistance. g. Place the LINE switch to STANDBY, then install one of the removed PCBs or the YIG-tuned oscillator assembly.
  • Page 207 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-6. Error Messages 105 and 106 (10 of 10) Power Supply Not Phase-Locked Error 106 Power Supply not Locked Description: The switching power supply is not phase locked to the 400 kHz reference signal from the A6 Square Wave Generator PCB. Step 1.
  • Page 208 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-8. Error Messages 108, 109 and 110 (1 of 2) A3 Reference Loop Error 108 Crystal Oven Cold Description: The oven of the 100 MHz crystal oscillator or the Option 16 high-stability 10 MHz crystal oscillator has not reached operating temperature.
  • Page 209 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-8. Error Messages 108, 109 and 110 (2 of 2) Error 110 The 100MHz Reference is not Locked to the High Sta- bility 10MHz Crystal Oscillator Description: The reference loop is not phase-locked to the Option 16 high stability 10 MHz crystal oscillator.
  • Page 210 Step 6. Reconnect cable W107 to A5J1 and run self-test again. If error 111 is not displayed, the problem is cleared. If error 111 is still displayed, contact your local WILTRON service center for assistance. Table 5-10. Fine Loop Frequencies...
  • Page 211 Step 6. Reconnect cable W106 to A4J3 and run self-test again. If error 112 is not displayed, the problem is cleared. If error 112 is still displayed, contact your local WILTRON service center for assistance. Table 5-12. Coarse Loop Frequencies...
  • Page 212 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-13. Error Messages 113 and 115 (1 of 2) A7 YIG Loop Error 113 YIG Loop Osc Failed Error 115 Not Locked Indicator Failed Description: Error 113 indicates that the YIG loop is not phase- locked. Error 115 indicates a failure of the not phased-lock indicator cir- cuit.

  • Page 213: Down Converter

    If error 113 or 115 are not displayed, the problem is cleared. If either error 113 or 115 are displayed, contact your local WILTRON service center for assistance. Table 5-14. Error Message 114 Down Converter Error 114 Down Converter LO not Locked Description: The local oscillator in the down converter assembly is not phase-locked.
  • Page 214 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-15. Error Message 116 (1 of 2) A11 AM/FM PCB Error 116 FM Loop Gain Check Failed Description: The FM loop has failed or the loop gain is out of toler- ance. During self-test, the fine loop is offset 10 MHz and the internal DVM checks for a 1 volt offset at the output of A11 AM/FM PCB.
  • Page 215 Replace the A5 PCB and run self-test again. If error 116 is not displayed, the problem is cleared. If error 116 is displayed, contact your local WILTRON serv- ice center for assistance. Table 5-16. Error Messages 107, 117, 118, 119, and 120...
  • Page 216 If no error message is displayed, the problem is cleared. If any of the error messages, listed above, is displayed, contact your local WILTRON service center for assistance. Error 142 Sample and Hold Circuit Failed Description: Error 142 indicates a failure of the sample and hold cir- cuitry on the A10 PCB.
  • Page 217 If error 143 is still displayed, go to step 4. Step 4. Replace the A12 PCB and run self-test again. If error 143 is not displayed, the problem is cleared. If error 143 is still displayed, contact your local WILTRON service center for assistance. 681XXA MM 5-33...
  • Page 218 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-18. Error Messages 124, 125, and 126 (1 of 2) YIG-tuned Oscillator Error 124 Full Band Unlocked and Unleveled Error 125 8.4-20 GHz Unlocked and Unleveled Error 126 2-8.4 GHz Unlocked and Unleveled Description: These error messages indicate either a failure of one or both of the oscillators in the 2-20 GHz YIG-tuned oscillator assembly.
  • Page 219 Run self-test again. If no error message is displayed, the problem is cleared. If any of the error messages, listed above, is displayed, contact your local WILTRON service center for assistance. Table 5-19. YIG-tuned Oscillator Bias Voltages YIG-tuned Oscillator Bias Voltages Test Point 2 to 8.4 GHz...
  • Page 220 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (1 of 6) Output Power Level Related Problems (0.01 to 20 GHz) Error 128 .01-2 GHz Unleveled Description: Error 128 indicates a failure of of the down converter leveling circuitry.
  • Page 221 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (2 of 6) Step 3. Using the oscilloscope, check at the end of the cable that is connected to A10J3 for a >0.7 volt down converter detector output throughout the full sweep.
  • Page 222 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (3 of 6) If there is no RF signal or if the amplitude of the RF sig- nal is low, replace the switched filter assembly. Error 129 Switched Filter or Level Detector Failed Description: Error 129 indicates a failure of either the switched fil- ter or level detector circuitry.
  • Page 223 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (4 of 6) Step 3. Using the oscilloscope, check the switched filter bias volt- ages at A13TP4 and A13TP9. The bias voltage at A13TP4 should be +6 volts;...
  • Page 224 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (5 of 6) Error 130 2-3.3 GH Switched Filter Error 131 3.3-5.5 GH Switched Filter Error 132 5.5-8.4 GH Switched Filter Error 133 8.4-13.25 GH Switched Filter Error 134 13.25-20 GH Switched Filter Description: Each of these error messages indicates a failure in a switched filter path within the switched filter assembly.
  • Page 225 If error 135 is still displayed, go to step 2. Step 2. Replace the switched filter assembly and run self-test again. If error 135 is not displayed, the problem is cleared. If error 135 is still displayed, contact your local WILTRON service center for assistance. 681XXA MM 5-41...
  • Page 226 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-22. Error Messages 136, 137, 138, 139, 140, and 141 (1 of 4) Output Power Level Related Problems (20 to 40 GHz) 681XXA Models with FEU Error 136 26.5 to 40 GHz Modulator or Driver Failed Error 137 20 to 26.5 GHz Modulator or Driver Failed Description: Each of these error messages indicates a failure of a modulator in the FEU or a failure of the modulator driver circuitry on...
  • Page 227 If the modulator driver voltages do not change, replace the FEU. If the modulator driver voltages change as described, con- tact your local WILTRON service center for assistance. Error 138 FEU Unit or Driver Failed Description: Error 138 indicates a failure of the FEU, a failure of the FEU bias regulator circuitry on the A14 Doubler Driver PCB, or an in- correct RF signal level from the switched filter assembly.
  • Page 228 If error 138 is still displayed, go to step 9. Step 9. Replace the FEU and run self-test again. If error 138 is not displayed, the problem is cleared. If error 138 is still displayed, contact your local WILTRON service center for assistance. 5-44 681XXA MM...
  • Page 229 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-22. Error Messages 136, 137, 138, 139, 140, and 141 (4 of 4) Error 139 33-40 GHz FEU Section Failed Error 140 26-33 GHz FEU Section Failed Error 141 20-26 GHz FEU Section Failed Description: Each of these error messages indicates a failure in a doubler/amplifier path within the FEU.
  • Page 230 If error 138 is still displayed, go to step 5. Step 5. Replace the A12 PCB and run self-test again. If error 138 is not displayed, the problem is cleared. If error 138 is still displayed, contact your local WILTRON service center for assistance. 5-46 681XXA MM...
  • Page 231 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-24. Error Messages 138, 139, 140, and 141 (2 of 2) Error 139 32-40 GHz SDM Section Failed Error 140 25-32 GHz SDM Section Failed Error 141 20-25 GHz SDM Section Failed Description: Each of these error messages indicates a failure in a switched doubler filter path within the SDM.
  • Page 232 TROUBLESHOOTING TROUBLESHOOTING TABLES Table 5-26. Error Message 144 Error 144 RF was Off when Selftest started. Some tests where not performed Description: Indicates that some self-test where not performed be- cause the RF Output was selected OFF on the front panel. Step 1.
  • Page 233 Chapter 6 Removal and Replacement Procedures Table of Contents INTRODUCTION ....6-3 REMOVING AND REPLACING THE CHASSIS COVERS ..... . . 6-4 Preliminary .
  • Page 234 Procedure ..... . 6-11 REMOVING AND REPLACING THE A16 OR A17 PCB ..... . . 6-11 Preliminary .

  • Page 235: Chapter 6 Removal And Replacement Procedures

    Chapter 6 Removal and Replacement Procedures INTRODUCTION This chapter provides procedures for gaining access to the major 681XXA assemblies, subassemblies, and components for calibration, troubleshooting, or replacement. WARNING Hazardous voltages are present inside the 681XXA when- ever ac line power is connected. Turn off the instrument and remove the line cord before removing any covers or panels.

  • Page 236: Replacement Procedures

    REMOVAL AND CHASSIS REPLACEMENT PROCEDURES COVERS REMOVING AND Calibration and troubleshooting procedures require removal of the top REPLACING THE cover. Replacement of some 681XXA assemblies and parts require re- CHASSIS COVERS moval of all covers. The following procedure describes this process. Preliminary Disconnect the power cord from the unit.
  • Page 237 REMOVAL AND CHASSIS COVER REPLACEMENT PROCEDURES REMOVAL DIAGRAM Rear Top Cover Feet Bottom Cover Strap Handle Figure 6-1. Top Chassis Cover Removal 681XXA MM...

  • Page 238: Removing And Replacing The Front Panel Assembly

    REMOVAL AND FRONT PANEL REPLACEMENT PROCEDURES ASSEMBLY REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE FRONT front panel assembly of the 681XXA. The front panel assembly con- PANEL ASSEMBLY tains the A1 and A2 Front Panel PCBs. Refer to Figure 6-2 during this procedure.
  • Page 239 REMOVAL AND FRONT PANEL ASSEMBLY REPLACEMENT PROCEDURES REMOVAL DIAGRAM Upper Rail (2) Side Rail (2) Lower Rail (2) Strap Handle (2) Front End Cap (2) Panel Assy. RF Output Connector Front Trim Strip (2) Handles Figure 6-2. Front Panel Assembly Removal 681XXA MM...

  • Page 240: Removing And Replacing The A3, A4, A5, Or A6 Pcb

    REMOVAL AND A3, A4, A5, REPLACEMENT PROCEDURES OR A6 PCB REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE A3, A4, A3 Reference Loop PCB, the A4 Coarse Loop PCB, the A5Fine Loop A5, OR A6 PCB PCB, or the A6 Square Wave Generator PCB, all of which are located in the RF housing (see Figure 6-3).
  • Page 241 REMOVAL AND PCB AND COMPONENT REPLACEMENT PROCEDURES LOCATOR DIAGRAM A21-1 Rear Panel BNC/AUX I/O Connector PCB Line Filter/ Rectifier PCB Fan Assy. A21P2 A19 Power Conditioner PCB A18 Power Supply PCB 2-20 GHz A17 CPU PCB YIG Oscillator A16 CPU Interface PCB Switched Regulator PCB...

  • Page 242: Removing And Replacing The A7 Pcb

    REMOVAL AND REPLACEMENT PROCEDURES A7 PCB REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE A7 PCB A7 YIG Loop PCB, which is located in the main card cage (see Figure 6-3). Preliminary Disconnect the power cord from the unit and remove the top cover as described in paragraph 6-2.

  • Page 243: Removing And Replacing The A13, A14, Or A15 Pcb

    REMOVAL AND A13, A14, REPLACEMENT PROCEDURES OR A15 PCB REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE A13, A13 YIG Driver PCB, the A14 Doubler Driver/A14-1 SDM Driver PCB, A14, OR A15 PCB or the A15 Regulator PCB, all of which are located in the main card cage (see Figure 6-3).

  • Page 244: Removing And Replacing The A18 Or A19 Pcb

    REMOVAL AND A18 OR REPLACEMENT PROCEDURES A19 PCB REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE A18 OR A18 Power Supply PCB or the A19 AC Line Conditioner PCB, both of A19 PCB which are located in the power supply housing assembly (see Figure 6-3).

  • Page 245: Removing And Replacing The A21-1 Pcb

    J13 on the Motherboard. Step 4 Disconnect the ribbon cable connector from the A21-1 PCB. Step 5 Using a WILTRON P/N T1451 tool, remove the dress nuts from the 11 rear panel BNC connectors. Step 6 Carefully remove the A21-1 PCB from the rear panel assembly.

  • Page 246: Removing And Replacing The Rear Panel Assembly

    REMOVAL AND REAR PANEL REPLACEMENT PROCEDURES ASSEMBLY 6-11 REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE REAR rear panel assembly of the 681XXA. The rear panel assembly contains PANEL ASSEMBLY the A21 Line Filter/Rectifier PCB, the A21-1 BNC/AUX I/O Connector PCB, the line module assembly, and the fan assembly.
  • Page 247 REMOVAL AND REAR PANEL ASSEMBLY REPLACEMENT PROCEDURES REMOVAL DIAGRAM High Voltage A21-1 PCB Safety Shield Ribbon Cable Cable GPIB Cable A21P2 Upper Rail (2) A21-1 Side Rail (2) Strap Handle (2) 10 MHz 10 MHz REF IN REF OUT Assy. Cable Cable Rear...
  • Page 248 REMOVAL AND REAR PANEL REPLACEMENT PROCEDURES ASSEMBLY ⁄ Step 10 Using a -inch wrench, disconnect the coaxial cables going to the rear panel 10 MHz REF IN and 10 MHz REF OUT BNC connectors. Step 11 Remove the plastic high voltage safety shield located over the A21 Line Fil- ter/Rectifier PCB.

  • Page 249: Removing And Replacing The A21 Pcb

    REMOVAL AND REPLACEMENT PROCEDURES A21 PCB 6-12 REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE A21 Line Filter/Rectifier PCB, which is located on the rear panel as- A21 PCB sembly (see Figure 6-4). Preliminary Disconnect the power cord from the unit. Remove the top and bottom covers as described in paragraph 6-2.

  • Page 250: Removing And Replacing The Fan Assembly

    REMOVAL AND REPLACEMENT PROCEDURES ASSEMBLY 6-13 REMOVING AND This paragraph provides instructions for removing and replacing the REPLACING THE FAN fan assembly, which is located on the rear panel assembly (see Figure ASSEMBLY 6-4). Preliminary Disconnect the power cord from the unit. Remove the top and bottom covers as described in paragraph 6-2.

  • Page 251: Appendix A Test Records

    Appendix A Test Records INTRODUCTION This appendix provides test records for recording the results of the Per- formance Verification tests (Chapter 3) and the Calibration procedures (Chapter 4). They jointly provide the means for maintaining an accu- rate and complete record of instrument performance. Test records are provided for all four models of the Series 681XXA Synthesized Sweep Generator.
  • Page 252 WILTRON Model 68137A Date: __________________________ Serial Number __________________ Tested By: __________________________ 3-5. Internal Time Base Aging Rate Test Test Procedure Measured Value Upper Limit Record T value ......
  • Page 253 TEST RECORD MODEL 68137A 3-6. Frequency Synthesis Tests Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68137A) Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value ** 2.000 000 000 _____________________ 2.000 001 000 _____________________ 3.000 000 000 _____________________...
  • Page 254 TEST RECORD MODEL 68137A 3-7. Spurious Signals Test: RF Output Signals <2 GHz This test is not applicable to the 68137A model. 3.8 Harmonic Test: RF Output Signals From 2 to 20 GHz Test Procedure (2 to 10 GHz) Measured Value Upper Limit Set F1 to 2.1 GHz Record the level of all harmonics of the 2.1 GHz carrier:...
  • Page 255 TEST RECORD MODEL 68137A 3.8 Harmonic Test: RF Output Signals From 2 to 20 GHz (Continued) Test Procedure (11 to 20 GHz) Measured Value Upper Limit Set F1 to 12.4 GHz Record the level of all harmonics of the 12.4 GHz carrier: 24.8 GHz (2nd harmonic) .
  • Page 256 TEST RECORD MODEL 68137A 3-10. Power Level Accuracy and Flatness Tests (68137A Models without Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 5.0 GHz Set L1 to: Measured Power * +13.0 dBm _________dBm +12.0 dBm _________dBm +11.0 dBm _________dBm +10.0 dBm...
  • Page 257 TEST RECORD MODEL 68137A 3-10. Power Level Accuracy and Flatness Tests (68137A Models with Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 5.0 GHz Set L1 to: Measured Power * +10.0 dBm _________dBm + 9.0 dBm _________dBm + 8.0 dBm _________dBm...
  • Page 258 TEST RECORD MODEL 68137A 3-10. Power Level Accuracy and Flatness Tests (68137A Models with Option 15 High Power and without Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 5.0 GHz Set L1 to: Measured Power * +17.0 dBm _________dBm +16.0 dBm...
  • Page 259 TEST RECORD MODEL 68137A 3-10. Power Level Accuracy and Flatness Tests (68137A Models with Option 15 High Power and Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 5.0 GHz Set L1 to: Measured Power * +14.0 dBm _________dBm +13.0 dBm _________dBm...
  • Page 260 WILTRON Model 68137A Date: __________________________ Serial Number __________________ Calibrated By: __________________________ 4-7. Preliminary Calibration Procedure Step Step Completion Reset the Linearizer DACs ....... . .
  • Page 261 TEST RECORD MODEL 68137A 4-8. Switched Filter Shaper Calibration Minimum Unleveled Power Point Measurement Measured Frequency 5. Record the minimum unleveled power point frequency for each frequency band: Band 1 (2.0-3.3 GHz) ....... . . ______________GHz Band 2 (3.3-5.5 GHz) .
  • Page 262 TEST RECORD MODEL 68137A 4-9. ALC Slope Calibration Procedure Step Step Completion 5. ALC Slope DAC adjustment for ≤2 GHz _____N/A______ ( This step is not applicable to the 68137A ) ..... . . 9.
  • Page 263 TEST RECORD MODEL 68137A 4-12. AM Calibration Procedure Step Step Completion 2. Linear AM Calibration (calterm 112) ......______________ 3.
  • Page 264 WILTRON Model 68147A Date: __________________________ Serial Number __________________ Tested By: __________________________ 3-5. Internal Time Base Aging Rate Test Test Procedure Measured Value Upper Limit Record T value ......
  • Page 265 TEST RECORD MODEL 68147A 3-6. Frequency Synthesis Tests Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68147A) Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value ** 1.000 000 000 _____________________ 1.000 001 000 _____________________ 2.000 000 000 _____________________...
  • Page 266 TEST RECORD MODEL 68147A 3-7. Spurious Signals Test: RF Output Signals <2 GHz Test Procedure Measured Value Upper Limit Set F1 to 10 MHz Record the presence of the worst case harmonic .._______________dBc –30 dBc Record the presence of the worst case non-harmonic .
  • Page 267 TEST RECORD MODEL 68147A 3-8. Harmonic Test: RF Output Signals From 2 to 20 GHz Test Procedure (2 to 10 GHz) Measured Value Upper Limit Set F1 to 2.1 GHz Record the level of all harmonics of the 2.1 GHz carrier: 4.2 GHz (2nd harmonic) .
  • Page 268 TEST RECORD MODEL 68147A 3-8. Harmonic Test: RF Output Signals From 2 to 20 GHz (Continued) Test Procedure (11 to 20 GHz) Measured Value Upper Limit Set F1 to 12.4 GHz Record the level of all harmonics of the 12.4 GHz carrier: 24.8 GHz (2nd harmonic) .
  • Page 269 TEST RECORD MODEL 68147A 3-10. Power Level Accuracy and Flatness Tests (68147A Models without Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 1.0 GHz Set F1 to 5.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power * +13 dBm _________dBm...
  • Page 270 TEST RECORD MODEL 68147A 3-10. Power Level Accuracy and Flatness Tests (68147A Models with Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 1.0 GHz Set F1 to 5.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power * +10 dBm _________dBm...
  • Page 271 TEST RECORD MODEL 68147A 3-10. Power Level Accuracy and Flatness Tests (68147A Models with Option 15 High Power and without Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 1.0 GHz Set F1 to 5.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power *...
  • Page 272 TEST RECORD MODEL 68147A 3-10. Power Level Accuracy and Flatness Tests (68147A Models with Option 15 High Power and Option 2A Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 1.0 GHz Set F1 to 5.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power...
  • Page 273 WILTRON Model 68147A Date: __________________________ Serial Number __________________ Calibrated By: __________________________ 4-7. Preliminary Calibration Procedure Step Step Completion Reset the Linearizer DACs ....... . .
  • Page 274 TEST RECORD MODEL 68147A 4-8. Switched Filter Shaper Calibration Minimum Unleveled Power Point Measurement Measured Frequency 5. Record the minimum unleveled power point frequency for each frequency band: Band 0 (0.01-2.0 GHz) ....... . . ______________GHz Band 1 (2.0-3.3 GHz) .
  • Page 275 TEST RECORD MODEL 68147A 4-9. ALC Slope Calibration Procedure Step Step Completion 5. ALC Slope DAC adjustment for ≤2 GHz ......______________ 9.
  • Page 276 TEST RECORD MODEL 68147A 4-12. AM Calibration Procedure Step Step Completion 2. Linear AM Calibration (calterm 112) ......______________ 3.
  • Page 277 WILTRON Model 68163A Date: __________________________ Serial Number __________________ Tested By: __________________________ 3-5. Internal Time Base Aging Rate Test Test Procedure Measured Value Upper Limit Record T value ......
  • Page 278 TEST RECORD MODEL 68163A 3-6. Frequency Synthesis Tests Coarse Loop/YIG Loop Test Procedure Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value * 2.000 000 000 _____________________ 21.000 000 000 _____________________ 3.000 000 000 _____________________ 22.000 000 000 _____________________ 4.000 000 000 _____________________...
  • Page 279 TEST RECORD MODEL 68163A 3-6. Frequency Synthesis Tests Fine Loop Test Procedure (Standard 68163A) Fine Loop Test Procedure (68163A with Option 11) Test Frequency (in GHz) Measured Value ** Test Frequency (in GHz) Measured Value *** 2.000 001 000 _____________________ 2.000 000 100 _____________________ 2.000 002 000...
  • Page 280 TEST RECORD MODEL 68163A 3-8. Harmonic Test: RF Output Signals From 2 to 20 GHz Test Procedure (2 to 10 GHz) Measured Value Upper Limit Set F1 to 2.1 GHz Record the level of all harmonics of the 2.1 GHz carrier: 4.2 GHz (2nd harmonic) .
  • Page 281 TEST RECORD MODEL 68163A 3-9. Single Sideband Phase Noise Test Test Procedure Measured Value Upper Limit Set F1 to 5.0 GHz Record the phase noise levels at these offsets: 100 Hz ....... _______________dBc –67 dBc 1 kHz .
  • Page 282 TEST RECORD MODEL 68163A 3-10. Power Level Accuracy and Flatness Tests (68163A Models without Option 2B Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 5.0 GHz Set F1 to 26.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power * + 6dBm _________dBm...
  • Page 283 TEST RECORD MODEL 68163A 3-10. Power Level Accuracy and Flatness Tests (68163A Models with Option 2B Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 5.0 GHz Set F1 to 26.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power * + 2 dBm _________dBm...
  • Page 284 WILTRON Model 68163A Date: __________________________ Serial Number __________________ Calibrated By: __________________________ 4-7. Preliminary Calibration Procedure Step Step Completion Reset the Linearizer DACs ....... . .
  • Page 285 TEST RECORD MODEL 68163A 4-8. Switched Filter Shaper Calibration Minimum Unleveled Power Point Measurement Measured Frequency 5. Record the minimum unleveled power point frequency for each frequency band: Band 1 (2.0-3.3 GHz) ....... . . ______________GHz Band 2 (3.3-5.5 GHz) .
  • Page 286 TEST RECORD MODEL 68163A 4-8. Switched Filter Shaper Calibration (Continued) Enter DAC Settings (Continued) Step Completion 1.b The following applies only to units containing a FEU: Select Item 9 for Band 6 (20.0-26.5 GHz) ..... . . ______________ Select Item 10 for Band 7 (26.5-33.0 GHz) .
  • Page 287 TEST RECORD MODEL 68163A 4-11. AM Bandwidth Calibration AM Bandwidth Adjustment DAC Setting Value 5.c Record the DAC’s setting value for each frequency band: Band 1 (2.0-3.3 GHz) ....... . . ______________ Band 2 (3.3-5.5 GHz) .
  • Page 288 TEST RECORD MODEL 68163A 4-12. AM Calibration Procedure Step Step Completion 2. Linear AM Calibration (calterm 112) ......______________ 3.
  • Page 289 WILTRON Model 68169A Date: __________________________ Serial Number __________________ Tested By: __________________________ 3-5. Internal Time Base Aging Rate Test Test Procedure Measured Value Upper Limit Record T value ......
  • Page 290 TEST RECORD MODEL 68169A 3-6. Frequency Synthesis Tests Coarse Loop/YIG Loop Test Procedure Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value * 1.000 000 000 _____________________ 21.000 000 000 _____________________ 2.000 000 000 _____________________ 22.000 000 000 _____________________ 3.000 000 000 _____________________...
  • Page 291 TEST RECORD MODEL 68169A 3-6. Frequency Synthesis Tests Fine Loop Test Procedure (Standard 68169A) Fine Loop Test Procedure (68169A with Option 11) Test Frequency (in Ghz) Measured Value ** Test Frequency (in Ghz) Measured Value *** 1.000 001 000 _____________________ 1.000 000 100 _____________________ 1.000 002 000...
  • Page 292 TEST RECORD MODEL 68169A 3-7. Spurious Signals Test: RF Output Signals <2 GHz Test Procedure Measured Value Upper Limit Set F1 to 10 MHz Record the presence of the worst case harmonic .._______________dBc –30 dBc Record the presence of the worst case non-harmonic .
  • Page 293 TEST RECORD MODEL 68169A 3-8. Harmonic Test: RF Output Signals From 2 to 20 GHz Test Procedure (2 to 10 GHz) Measure Value Upper Limit Set F1 to 2.1 GHz Record the level of all harmonics of the 2.1 GHz carrier: 4.2 GHz (2nd harmonic) .
  • Page 294 TEST RECORD MODEL 68169A 3-9. Single Sideband Phase Noise Test Test Procedure Measured Value Upper Limit Set F1 to 5.0 GHz Record the phase noise levels at these offsets: 100 Hz ....... _______________dBc –67 dBc 1 kHz .
  • Page 295 TEST RECORD MODEL 68169A 3-10. Power Level Accuracy and Flatness Tests (68169A Models without Option 2B Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 1.0 GHz Set F1 to 5.0 GHz Set F1 to 26.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power *...
  • Page 296 TEST RECORD MODEL 68169A 3-10. Power Level Accuracy and Flatness Tests (68169A Models with Option 2B Step Attenuator) Power Level Accuracy Test Procedure Set F1 to 1.0 GHz Set F1 to 5.0 GHz Set F1 to 26.0 GHz Set L1 to: Measured Power * Set L1 to: Measured Power *...
  • Page 297 WILTRON Model 68169A Date: __________________________ Serial Number __________________ Calibrated By: __________________________ 4-7. Preliminary Calibration Procedure Step Step Completion Reset the Linearizer DACs ....... . .
  • Page 298 TEST RECORD MODEL 68169A 4-8. Switched Filter Shaper Calibration Minimum Unleveled Power Point Measurement Measured Frequency 5. Record the minimum unleveled power point frequency for each frequency band: Band 0 (0.01-2.0 GHz) ....... . . ______________GHz Band 1 (2.0-3.3 GHz) .
  • Page 299 TEST RECORD MODEL 68169A 4-8. Switched Filter Shaper Calibration (Continued) Enter DAC Settings (Continued) Step Completion Select Item 8 for Band 5 (13.25-20.0 GHz) ..... . ______________ The following applies only to units containing a FEU: Select Item 9 for Band 6 (20.0-26.5 GHz) .
  • Page 300 TEST RECORD MODEL 68169A 4-11. AM Bandwidth Calibration AM Bandwidth Adjustment DAC Setting Value 5.c Record the DAC’s setting value for each frequency band: Band 0 (0.01-2.0 GHz) ....... . . ______________ Band 1 (2.0-3.3 GHz) .
  • Page 301 TEST RECORD MODEL 68169A 4-12. AM Calibration Procedure Step Step Completion 2. Linear AM Calibration (calterm 112) ......______________ 3.

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