Advertisement
Features
■
Integrated phase-locked loop (PLL)
■
Low-jitter, high-accuracy outputs
■
VCXO with analog adjust
■
3.3V Operation
■
8-pin SOIC
Part Number
Outputs
CY24713
3
Logic Block Diagram
Pin Configuration
Table 1. Pin Definition
Name
XIN
VDD
VCXO
VSS
CLK_B
CLK_A
CLK_C
[1]
XOUT
Note
1. Float X
if X
is externally driven.
OUT
IN
Cypress Semiconductor Corporation
Document #: 38-07396 Rev. *A
Set-top Box Clock Generator with VCXO
Input Frequency Range
27-MHz pullable crystal input
per Cypress specification
Figure 1. CY24713, 8-Pin SOIC
Number
Description
1
Reference Crystal Input
2
3.3V Voltage Supply
3
Input Analog Control for VCXO
4
Ground
5
13.5-MHz Clock Output
6
4.9152-MHz Clock Output
7
27-MHz Clock Output
8
Reference Crystal Output
•
198 Champion Court
Benefits
■
High-performance PLL tailored for Set Top Box applications
■
Meets critical timing requirements in complex system designs
■
Large ±150-ppm range, better linearity
■
Meet industry standard voltage platforms
■
Industry standard packaging saves on board space
Output Frequencies
4.9152 MHz, 13.5 MHz, 27 MHz
,
•
San Jose
CA 95134-1709
CY24713
•
408-943-2600
Revised May 22, 2008
[+] Feedback
Advertisement
Table of Contents
Subscribe to Our Youtube Channel
Related Manuals for Cypress Semiconductor Set-top Box Clock Generator with VCXO CY24713
Summary of Contents for Cypress Semiconductor Set-top Box Clock Generator with VCXO CY24713
- Page 1 Features ■ Integrated phase-locked loop (PLL) ■ Low-jitter, high-accuracy outputs ■ VCXO with analog adjust ■ 3.3V Operation ■ 8-pin SOIC Part Number Outputs Input Frequency Range CY24713 27-MHz pullable crystal input per Cypress specification Logic Block Diagram Pin Configuration Table 1.
-
Page 2: Recommended Operating Conditions
Absolute Maximum Conditions Parameter Supply Voltage Storage Temperature Junction Temperature Digital Inputs Digital Outputs referred to V Electrostatic Discharge Analog Input Pullable Crystal Specifications Parameter Description Nominal crystal frequency Nominal load capacitance LNOM Equivalent series resistance (ESR) Ratio of third overtone mode ESR to fundamen- tal mode ESR Crystal drive level Third overtone separation from 3*F... -
Page 3: Ac Electrical Characteristics
AC Electrical Characteristics Parameter Description Output Duty Cycle Rising Edge Rate Falling Edge Rate Clock Jitter PLL Lock Time V DD 0.1 μF Figure 4. Rise and Fall Time Definitions: ER = 0.6 x V Note 3. Not 100% tested Document #: 38-07396 Rev. -
Page 4: Ordering Information
Ordering Information Ordering Code Package Type CY24713SC 8-pin SOIC CY24713SCT 8-pin SOIC Pb-free CY24713SXC 8-pin SOIC CY24713SXCT 8-pin SOIC-Tape and Reel CY24713KSXC 8-pin SOIC CY24713KSXCT 8-pin SOIC-Tape and Reel Package Diagram 0.189[4.800] 0.196[4.978] 0.050[1.270] 0.0138[0.350] 0.0192[0.487] Note 4. Not recommended for new designs. Document #: 38-07396 Rev. - Page 5 Document History Page Document Title: CY24713 Set-top Box Clock Generator with VCXO Document Number: 38-07396 Orig. of Submission REV. ECN No. Change 333175 See ECN 2440886 AESA See ECN Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales.
Need help?
Do you have a question about the Set-top Box Clock Generator with VCXO CY24713 and is the answer not in the manual?
Questions and answers