Ametek United Electronic Industries DNx-ARINC-664 User Manual
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Ametek United Electronic Industries DNx-ARINC-664 User Manual

Ametek United Electronic Industries DNx-ARINC-664 User Manual

Arinc-664 protocol communications interface for the powerdna cube or rack series chassis
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DNx-ARINC-664
—
User Manual
ARINC-664 Protocol Communications Interface
for the PowerDNA Cube or RACK series chassis
November 2023
PN Man-DNx-ARINC-664
© Copyright 1998-2023 United Electronic Industries, Inc. All rights reserved.

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Summary of Contents for Ametek United Electronic Industries DNx-ARINC-664

  • Page 1 DNx-ARINC-664 — User Manual ARINC-664 Protocol Communications Interface for the PowerDNA Cube or RACK series chassis November 2023 PN Man-DNx-ARINC-664 © Copyright 1998-2023 United Electronic Industries, Inc. All rights reserved.
  • Page 2 Telephone: (508) 921-4600 Fax: (508) 668-2350 Also see the FAQs and online “Live Help” feature on our web site. Internet Support: Support: uei.support@ametek.com www.ueidaq.com Web-Site: FTP Site: ftp://ftp.ueidaq.com Product Disclaimer: WARNING! DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIES, INC. AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.

  • Page 3: Table Of Contents

    DNx-ARINC-664 Board Table of Contents Table of Contents Chapter 1 Introduction ........... . 1 Organization of this Manual .
  • Page 4 DNx-ARINC-664 Board List of Figures List of Figures The DNR-ARINC-664 Board..................4 Example of the DNx-ARINC-664 in an ARINC-664 Network.........6 Basic ARINC-664 Network (Logical Addressing Perspective)........7 The OSI Model for ARINC-664 Systems ..............10 ARINC-664 Packet Structure..................12 DNx-ARINC-664 Logic Block Diagram ................14 Connection diagram for the DNR-ARINC-664 .............15 Immediate (left), VMap (top right), aEvent (lower right)..........20 DaqBios packet format for VMap refresh..............22...

  • Page 5: Chapter 1 Introduction

    DNx-ARINC-664 Board Chapter 1 Introduction Chapter 1 Introduction This document outlines the feature set of the DNx-ARINC-664 board and its use as an ARINC-664 communications interface. Organization This DNx-ARINC-664 User Manual is organized as follows: of this Manual • Introduction This section provides an overview of the DNx-ARINC-664 avionics interface board features, device architecture, and connectivity.
  • Page 6 DNx-ARINC-664 Board Chapter 1 Introduction Manual Conventions To help you get the most out of this manual and our products, please note that we use the following conventions: Tips are designed to highlight quick ways to get the job done or to reveal good ideas you might not discover on your own.

  • Page 7: Dnx-Arinc-664 Board Overview

    DNx-ARINC-664 Board Chapter 1 Introduction DNx-ARINC- The DNx-ARINC-664 is a 2 channel communications interface compatible with 664 Board ARINC-664 Part 7 (a.k.a. ARINC-664 and the Airbus variant). The DNA-ARINC-664 and DNR-ARINC-664 versions are designed for UEI’s Cube Overview and RACKtangle I/O chassis respectively. Channels may be configured as a single A or B channel or as one dual redundant channel.

  • Page 8: Features

    DNx-ARINC-664 Board Chapter 1 Introduction Features The DNx-ARINC-664 features are as follws: • Compatible with ARINC-664 Part 7 (a.k.a. ARINC-664 and the Airbus variant) • 2 independent or 1 dual redundant channels • 100 BASE-T default (10/100/1000BASE-T capability) • Transmitter and/or Receiver functions •...

  • Page 9: Specification

    DNx-ARINC-664 Board Chapter 1 Introduction Specification The technical specification for DNx-ARINC-664 is provided in Table 1-1. Table 1-1 . DNx-ARINC-664 Technical Specifications Configuration Number of channels 2: supports A only, B only or dual redundant Ethernet BASE 1000 BASE-T Channel functions Transmit, Receive or Monitor VLs supported Up to 2000 VLs or ports with up to 664 active...

  • Page 10: Arinc-664 Overview

    DNx-ARINC-664 Board Chapter 1 Introduction ARINC-664 The ARINC-664 standard defines an aircraft data network in 8 parts. Part 7 Overview the standard (ARINC-664P7) specifies a deterministic network on the OSI data link layer. The UEI DNx-ARINC-664 board supports the standard ARINC-664 specification, but does not support the Boeing EDE extension.

  • Page 11: Arinc-664 Network Overview

    DNx-ARINC-664 Board Chapter 1 Introduction Once configured, the DNx-ARINC-664 allows your program to abstract away everything to ARINC-664 messages, allowing you to communicate using a handful of simple function calls documented in the PowerDNA API. Refer to Chapter 2 for more information about the DNx-ARINC-664 API and XML configuration.
  • Page 12 DNx-ARINC-664 Board Chapter 1 Introduction 1.6.2.1 Endsystems & Each endsystem has these characteristics: Partitions • Each endsystem must have a unique address in the network consisting of 16 bits from an 8-bit Network ID plus 8-bit End System ID and an additional 8-bit Partition ID.
  • Page 13 DNx-ARINC-664 Board Chapter 1 Introduction • Multiple partitions on an endsystem may read from the same sampling port’s received message buffer. This buffer is not cleared upon read. This receive buffer has a freshness indicator. Only a single buffer exists and is overwritten when a new message arrives.

  • Page 14: Osi Model Structure

    DNx-ARINC-664 Board Chapter 1 Introduction 1.6.3 OSI Model The following descriptions are in reference to the OSI 7-layer model for network communication. Refer to Figure 1-4 for layer stack: Structure Session to Application Layers Layers 5 to 7 determined by application UDP (limited) Layer 4: Transport IP or ICMP (limited)
  • Page 15 DNx-ARINC-664 Board Chapter 1 Introduction 1.6.3.3 OSI Layer 3 Layer 3 is the Network layer. ARINC-664 specifies a connectionless communication network with no routing (gateways for SAP are not considered) with a very restricted IP header carrying either a ICMP ECHO or a UDP datagram.

  • Page 16: Arinc-664 Packet Structure

    DNx-ARINC-664 Board Chapter 1 Introduction 1.6.4 ARINC-664 Figure 1-5 illustrates an ARINC-664 network packet as a UDP datagram. Packet The traditional Ethernet UDP datagram structure varies for ARINC-664 packets Structure in the following ways: • An Ethernet frame contains an ARINC-664 sequence number (SN), 0-255.

  • Page 17: Bandwidth

    DNx-ARINC-664 Board Chapter 1 Introduction 1.6.5 Bandwidth Bandwidth utilization for 17 byte and 1471 byte payloads is: • 17 byte payload: 100Mbps/(8bits)/(84 octets/frame)=148810 frames/sec or effectively 148810 FPS * 17 Bytes/frame = 2,529,770 B/s (2.4 MiB/s) • 1471 byte payload: 100Mbps/(8 bits)/(1538 octets/frame)=8127 frames/sec or effectively 8127 FPS * 1471 Bytes/frame = 11,954,817 B/s (11.4 MiB/s) 8127 frames / 1000 msec is about 8 sampling messages of 1471 bytes per ms, and at 17 bytes that is 148 sampling messages per millisecond.

  • Page 18: Device Architecture

    DNx-ARINC-664 Board Chapter 1 Introduction Device This section describes the hardware used in the DNx-ARINC-664 board. Architecture A block diagram of the board is shown in Figure 1-6. DNx-ARINC-664 board Boot/Store Flash Bus A 128MB RAM FPGA/DSP block control Bus B ARINC-side Logic data Bus Multiplexor...

  • Page 19: Wiring & Connectors

    DNx-ARINC-664 Board Chapter 1 Introduction Wiring & The following ports are located on the front-end of the DNx-ARINC-664 board: Connectors • RS-232 female connector to debug the DNx-ARINC-664. • Dual TIA/EIA-568 female sockets accepts Category 5/6 straight-through unshielded twisted-pair (UTP) wire - the same Fast Ethernet or Gigabit Ethernet copper wiring that is used to connect PCs to LANs.

  • Page 20: Chapter 2 Programming With The Low-Level Api

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API Chapter 2 Programming with the Low-level API This chapter provides the following information about programming the DNx-ARINC-664 using the low-level API: • About the Low-level API (Section 2.1) • Low-level Functions (Section 2.2) •...
  • Page 21 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API Table 2-1 Summary of Low-level API Functions for DNx-ARINC-664 (Continued) Function Descripti (Continued) (Continued)on DqAdv664GetHandle Gets a VL or port handle by their ID. DqAdv664RecvMessage Gets a Sampling or Queuing message. DqAdv664RecvMessageHdr Gets a Sampling, Queuing, or SAP message and headers.

  • Page 22: Tutorial

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API Tutorial The following tutorial provides a brief overview of how to set up and use your DNx-ARINC-664 using the low-level API. For best results, use this tutorial in conjunction with an actual code example, which can be found in either of the following directories: •...

  • Page 23: Configuration

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API 2.3.2 Configuration Prepare to configure the DNx-ARINC-664 card by clearing any existing configuration from its memory: // Clear the configuration on both bus A and B DqAdv664ClearConfig(hd, DEVN, AR664_VL_USE_A|AR664_VL_USE_B); Configure the VLs and ports by creating an XML configuration file and specifying its path to DqAdv664SetConfig() call as shown in the following code snippet.

  • Page 24: Send / Receive Messages

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API 2.3.3 Send / Receive The DNx-ARINC-664 board can send or receive messages in three ways: (1) Immediate mode; (2) Variable Data Map or VMap+; (3) Asynchronous mode. Messages The difference between the modes is described below with code snippets in the following sections.
  • Page 25 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API 2.3.3.1 Immediate To send messages, call DqAdv664SendMessage() using the ARINC-664 port handle. The following example shows how to do this for our previously- Mode configured sampling port: // Set up variables to return send status, and a message int written;...

  • Page 26: Daqbios Packet Format For Vmap Refresh

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API 2.3.3.2 VMap and Rather than receiving or transmitting data from each port, it is possible to set up a variable-size data map to receive and transmit multiple messages at once. Vmap+ Introduction VMap/VMap+ is described in detail in the “PowerDNx Protocol Manual”.

  • Page 27: Vmap Control & Data

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API For traditional VMap each ARINC-664 receive/transmit port handle added as an input/output channel is put into a transfer list. Scheduling data to write and be read can only be performed for those added ARINC-664 handles and only requires specifying the size to be written (and data in case of write) or read: 2-11764 bytes 2-128 Bytes...
  • Page 28 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API VMap and Vmap+ should be used when multiple ARINC-664 ports are to be updated simultaneously on the following platforms: (a) ARINC-664 ports used for transmit on PC in Slave mode (b) ARINC-664 ports for both transmit and receive on UEIPAC The examples that follow show how to use VMap and VMap+ in practice.
  • Page 29 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API To write data to a transmitting ARINC-664 port, first request it in the VMap packet: // Request how much data to write for channel for "myTxP1hdl" uint8 out_data[1440]; len = sprintf((char*)(out_data), “0123456789”); DqRtVmapWriteOutput(hd0, vmapid, DEVN, myTxP1hdl, len, out_data);...
  • Page 30 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API Stop & Close Once your simulation is complete, call DqAdv664Enable() to disable the DNx-ARINC-664 network operations, and then stop and clean up the VMaps with the calls: // Clean up VMap finish_up: if (vmapid) { DqRtVmapStop(hd0, vmapid);...
  • Page 31 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API The DqRtVmapWriteOutput call returns the number of bytes still available in the VMap packet ( ). When ( ) your request has been denied; if ret!=len ) then an error has occurred (for detail, call ret<0 DqTranslateError(ret) The VMap request is prepared so it can be sent with DqRtVmapRefresh.

  • Page 32: Stop Cleanly

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API 2.3.3.5 Asynchronous Asynchronous events were implemented to improve efficiency in receiving large quantities of data quickly from the ARINC-664 bus and transferring them to the Events or PC. The UEIPAC does not use aEvent mode because all traffic is local. aEvent Mode Asynchronous events are described in detail in the PowerDNx Protocol Manual.

  • Page 33: Uei Arinc-664 Xml Configuration

    DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API This stops operation of the DNx-ARINC-664 board without changing the configuration. UEI ARINC- As described in Section 2.3.2, each DNx-ARINC-664 device is configured using 664 XML an XML file. Configuration UEI provides a GUI-based ARINC-664 Configurator that allows users to create and edit ARINC-664 configuration XML files.
  • Page 34 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API Table 2-2 Summary of configuration Attributes (Continued) Configuration Attribute Description date unused metadata unused metadata author • One or more tags that define the following attributes: <VL> Table 2-3 Summary of VL Attributes VL Attribute Description name...
  • Page 35 DNx-ARINC-664 Board Chapter 2 Programming with the Low-level API Table 2-4 Summary of port Attributes (Continued) Port Attribute Description enabled Port enabled: “yes” or “no” VLID of parent: 16-bit virtual link of parent vlid subvl_id subVL ID: 1/0, 2, 3, or 4 port_type “Sampling”, “Queuing”, “SAP”, or “ICMP”...

  • Page 36: Chapter 3 Tools And Diagnostics

    DNx-ARINC-664 Board Chapter 3 Tools and Diagnostics Chapter 3 Tools and Diagnostics This chapter provides diagnostic information, procedures, and tools for troubleshooting the DNx-ARINC-664: • Diagnostic Panel for PowerDNA Explorer (Section 3.1) • Device RTOS Processes (Section 3.2) • ARINC-664 Network Packet Inspection (Section 3.3) Diagnostic PowerDNA Explorer is a GUI-based diagnostic application.

  • Page 37: Device Rtos Processes

    DNx-ARINC-664 Board Chapter 3 Tools and Diagnostics When Network > Start Reading Input Data is active, DqAdv664GetBusStats() will be called a few times per second. This is useful when debugging a few ARINC-664 ports but should not be used with more than 64 active ARINC-664 ports.
  • Page 38 DNx-ARINC-664 Board Chapter 3 Tools and Diagnostics • Integrity Checking (when enabled for A, B, or both): Receiver Initialized or Sequence Number is 0: (continue) Sequence Number is not PreviousSN+1 or +2: intg_drop++ (done) • Redundancy Management (when enabled in A&B mode): Receiver Initialized: (continue) SkewMax exceeded: rdnd_skewmax++ (continue) Already Received On Other Bus: rdnd_drop++ (done)

  • Page 39: Arinc-664 Network Packet Inspection

    DNx-ARINC-664 Board Chapter 3 Tools and Diagnostics ARINC-664 The following procedure can be used to inspect ARINC-664 network packets Network with Wireshark 1.10+. Wireshark is a free and open source network Packet instrumentation tool. Inspection Perform a Packet Capture 1. Prepare to capture packets •...
  • Page 40 DNx-ARINC-664 Board Chapter 3 Tools and Diagnostics Analyze a Captured Packet Click a captured packet as shown in the example below: The following information is shown: • Source MAC address (xx:xx:xx:xx:xx:20 indicates Bus A) • Destination MAC address: ends in VLID. In the above capture 0x4826h = 18470 Note: multicast IP addresses will also be, for example: 244.244.72.38 = 72*256+38 = 18470...
  • Page 41 DNx-ARINC-664 Board Chapter 3 Tools and Diagnostics Filter a Captured Packet To create a display filter to track an ARINC-664 connection, you can type a set of conditions to filter on into the Filter box (see image below). For example if you have determined that there is interesting data for a particular connection, you can filter by it: (ip.src == 10.1.82.2) &&...

  • Page 42: Accessories

    DNx-ARINC-664 Board Appendix Appendix A Accessories The following cables and STP boards are available for the DNx-ARINC-664. DNA-CAT5E-CBL This is a 4-conductor round unshielded twisted-pair cable with 8-pin male TIA/ EIA-568 connectors on both ends. DNA-DB9MF-CBL This is a 9-pin serial cable with male D-sub connectors on both ends. It is used to connects to your PC’s serial port or terminal console to the RS-232 port.

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