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Sanyo CDP-195 Service Manual page 13

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IC BLOCK DIAGRAM
& DESCRIPTION
1IC145 LC587006
System bus (16 bits)
4
OPG
(2 bit)
TT
ROM
Program
LC§87008
counter
8K x 10bit
|} (13 bits)
LC587006
8K x 16bit
LC587004
STACK -0
4K x 16bit
PORT -A
in
5)
ie)
Be) 4
(0) RES
F
XTIN
Xtai osc
WAIT.C
INT
Segment decoder
ca
Strobe decoder
:
CF/MC
ae
CFIN
i) he
7
Oo
Bs] pon) ' on
osc
©
400K~4M
(8) CFOUT
cen
Voltage driver
CUP2
circuit
'
k
Voo1
System clock
Voo2
generater
Voo
Vss
OIG)
rao
a
Zz22cs
oO
9000
ty
IC141 LB8108M
ackaes
:
ASPREF
OUTi+
OUT1-
OUT2+
OUT2-
OUT4+
OUT4-
OUT3+
OUT3- VOUT
PGND
(Te
Ab
am
9
v a l u e ]
__|
al
te-value
[|_|
_Absotute-vaiue
Drive
Drive
:
Drive
a
eal
IN3
switching
|
Leng
switchin
| > 4
Pees
ee]
az
Set
ae
Four-channet maximum
IN4
value circuit
Error
amplifier
SLREF
Dead time setting
intemal! 3.9V system (blocks drawn with hatching)
SLM
q
aes
cc
2
ay
DNB
S/S
Bias for
LO ON/ OFF
other blocks
CT
LO reference
RST
adjustment
Extemal
s
VLD
power/baltery
determination
LOUPB
GND
Bil
Bi2
OSC
OSC
LOCTL
MDin
CLD
VLDO
Bot
Bo2
PWR
LOGNOD
IC BLOCK DIAGRAM
& DESCRIPTION
LC78622E (Digital Signal Processor)
TST14.
TEST2
TESTS
EFMO
Wop
Vvss
POO ISET FR
PCK
TAI
TESTI
TESTS TESTS
Vop Vss
a:
leat
Se Fe
DEFI
Slice level
VCO Clock Li'
RAM Address
EFMIN
Control
& Clock Control
Generatorl
Digital Out
Qt) DOUT
C1 C2 Error Detect &
Correct Control Flag
Quadruple Over Sampling
Digital Filter
@4 (NC)
Servo Commander
General Ports
X'tal Root
mennera
iit
T
HL
OS UCDO
C1
CH CCE CIC)
HFL TES TOFF JP- JP+ RES
TGL
CONTI
CONT3
CONTS
EMPH
EFLG
16M 4.2M
FSX XIN
XVOD
RVoD
RCHO
=LCHO MUTEL
LVoD
CONT2
CONT4
XVSs
XOUT
RVss
MUTER
LVss
LA9240M (Servo Signal Processor)
Voc!
LoS
LOD
BHI PHI
LF2
VR REF1 Voc2 FSS ORF CE DAT CL CLK
O€F
6
2)-——6) 6)
6)-— 6G)
4)
«)
ay
a
=
!
VCA
[]
a
fl
=
FO- FA
FA-
FE FE-AGNOSP
SPI
SPG SP-
SPD
SLEQ
SLD
SL-SlL+
JP-
-15-

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