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Terminal
Symbol
vO
Terminal Function
No.
31
WOCK
D/A Interface for 48 bit slot. Word-clock f=2 Fs.
32
LRCK
D/A Interface for 48 bit slot. LR-clock f= Fs.
Power supply ( +5V ).
At PSSL=1 for DA16 (MBS) output; PSSL=0 for serial data of 48 bit slot. (2s';COMP, MSB first).
At PSSL=1 for DA15 output; PSSL=0 for bit clock of 48 bit slot.
At PSSL=1 for DA14 output; PSSL=0 for serial data of 64 bit slot. (2s''COMP, LSB first).
At PSSL=1 for DA13 output; PSSL=0 for bit clock of 64 bit slot.
At PSSL=1
for DA12 output; PSSL=0 for LR clock of 64 bit slot.
At PSSL=1 for DA11 output; PSSL=0 for GTOP output.
At PSSL=1 for DA10 output; PSSL=0 for XUGF output.
At PSSL=1 for DAOS output; PSSL=0 for XPLCK output.
At PSSL=1 for DA08 output; PSSL=0 for GFS output.
At PSSL=1 for DAO7 output; PSSL=0 for RFCK output.
At PSSL=1 for DAO6 output; PSSL=0 for C2PO output.
At PSSL=1 for DAOS output; PSSL=0 for XRAOF output.
At PSSL=1 for DA04 output; PSSL=0 for MNT3 output.
At PSSL=1 for DAO3 output; PSSL=0 for MNT2 output.
At PSSL=1 for DAO2 output; PSSL=0 for MNT1 output.
At PSSL=1 for DAO1 output; PSSL=0 for MNTO output.
Control output for aperture compensation. In H for R-ch.
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le
OQ
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38
39
DAI0
DA0S
DA08
DA07
DA06
DA0S
A04
41
O}o9
bee bead
Peeler
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43
&
O/O|O
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88
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45
47
48
49
Control output for aperture compensation. In H for L-ch.
G
Xtal oscillation circuit input. By selecting of mode, f=16.9344MHz or 33.8688MHz.
Zz 9
$2
wn
X'tal oscillation circuit input. f=16.9344MHz.
Selection input terminal of X'tal. "L" for X'tal 16.93844MHz; H for 33.8688MHz.
2/3 Dividing output of 53 and 54 terminal. No change by variabie pitch.
4.2336MHz output. When variable pitched, simultaneously changes.
16.9344MHz output. When variable pitched, simultaneously changes.
Digital-out ON/OFF control. ON at H; OFF at L.
Digital-out output terminal.
When playback disc emphasized, outputs H; otherwise outputs L.
WFCK ( Write Flame Clock) output.
Output of subcode sync. SO+S1. H output when either one detected.
Serial output of Sub P~W.
Clock iutput for SBSO read-out.
Output for Sub Q 80 bits and PCM peak level 16 bits.
Clock input for SQSO read-out.
Mute at H; remove mute at L.
SENS output. Outputs to CPU.
System reset input. Resets at "L".
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NX
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Cc a
61
m <
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=
63
SBSO
EXCK
SQso
SQCK
MUTE
SENS
[¢p)
8/3
5 |2
x
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"
4
67
70
71
DATA
Input of seria! data from CPU.
Input for latch from CPU. Latches serial data at release.
Von
Power supply (+5V).
Serial data transfer clock input from CPU.
SENS input from SSP.
Input of tracking pulse.
Serial data output to SSP.
Serial data latch output to SSP.
Serial data transfer clock output to SSP.
Mirror signal input. Use for track jump for over 128 tracks, using autosequencer.
74
75
76
0
i) a
fe)
A
Sy
x
b
SEIN
CNIN
DATO
78
XLTO
79
CLKO
30
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